- 您现在的位置：买卖IC网 > PDF目录378631 > IN74LV640N (INTEGRAL JOINT STOCK COMPANY) Octal 3-State Inverting Bus Transceiver PDF资料下载
参数资料
| 型号： | IN74LV640N |
| 厂商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Octal 3-State Inverting Bus Transceiver |
| 中文描述： | 八路三态反相总线收发器 |
| 文件页数： | 1/5页 |
| 文件大小： | 44K |
| 代理商： | IN74LV640N |
TECHNICAL DATA
1
Octal 3-State Inverting
Bus Transceiver
The 74LV640 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT640.
The 74LV640 provides six inverting buffers with Schmitt-trigger
action.
Wide Operating Voltage: 1.2 to 3.6 V
Optimized for Low Voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between V
CC
=2.7 V and V
CC
=3.6 V
Low input current
IN74LV640
ORDERING INFORMATION
IN74LV640N Plastic
IN74LV640D SOIC
IZ74LV640 Chip
T
A
= -40
°
to 125
°
C for all packages
PIN ASSIGNMENT
640
DIR
01
A
8
02
A
1
03
A
2
04
A
3
05
A
4
06
A
5
07
A
6
08
A
7
09
GND
10
20
19
18
17
16
15
14
13
12
11
B
8
B
1
B
2
B
3
B
4
B
5
B
6
B
7
OE
V
CC
LOGIC DIAGRAM
18
B
8
03
17
B
1
A
1
04
16
B
2
A
2
05
15
B
3
A
3
06
14
B
4
A
4
07
13
B
5
A
5
08
12
B
6
A
6
09
11
B
7
A
7
01
DIR
02
A
8
19
OE
PIN 20=V
CC
PIN 10 = GND
FUNCTION TABLE
Inputs
Inputs/Outputs
OE
DIR
à
L
L
A=B
input
L
H
input
B=A
H
X
Z
Z
相关PDF资料 |
PDF描述 |
|---|---|
| IN74LV74 | Dual D-type flip-flop with set and reset; positive-edge trigger |
| IN74LV74D | Dual D-type flip-flop with set and reset; positive-edge trigger |
| IN74LV74N | Dual D-type flip-flop with set and reset; positive-edge trigger |
| IN74LV86 | Quad 2-Input Exclusive OR Gate |
| IN74LV86D | Replaced by SN74ABT821A : 10-Bit Bus Interface Flip-Flops With 3-State Outputs 24-SSOP -40 to 85 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IN750A-1JANTX | 制造商:ERJ 功能描述: |
| IN750A1JANTXV | 制造商: 功能描述: |
| IN751A | 制造商: 功能描述: 制造商:undefined 功能描述: |
| IN75232 | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:EIA-232-D INTERFACE 1 CHIP IC |
| IN753ARL | 制造商:n/a 功能描述:SAMPLE |
发布紧急采购，3分钟左右您将得到回复。