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| 型号： | IR2167STRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 30/33页 |
| 文件大小： | 0K |
| 描述： | IC PFC BALLAST CTLR 20-SOIC |
| 标准包装： | 1,000 |
| 类型： | PFC/镇流器控制器 |
| 频率： | 41 ~ 47 kHz |
| 电流 - 电源： | 10mA |
| 电源电压： | 11.4 V ~ 15.6 V |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC（宽型） |
| 包装： | 带卷 (TR) |
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IR2167(S) & PbF
Component Selection Tips
Supply Bypassing and pc Board Layout Rules
Component selection and placement on the pc board is ex-
tremely important when using power control ICs. VCC should
be bypassed to COM as close to the IC terminals as pos-
sible with a low ESR/ESL capacitor, as shown in Figure 28.
Connecting the IC Ground (COM) to the Power Ground
Both the low power control circuitry and low side gate driver
output stage grounds return to this lead within the IC. The
COM lead should be connected to the bottom terminal of the
current sense resistor in the source of the low side power
MOSFET using an individual pc board trace, as shown in
Figure 29. In addition, the ground return path of the timing
C VCC
IR2167
pin 1
C VCC
(surface
mount)
C BOOT
(surface
mount)
D Boot
(surface
mount)
components and VCC decoupling capacitor should be con-
nected directly to the IC COM lead, and not via separate
traces or jumpers to other ground traces on the board.
IR2167 pin 1 (surface
mount)
C VCC (through hole)
component
C VCC (through hole)
timing
s
R CS (through hole)
V BUS return
Figure 28: Supply bypassing PCB layout example
Figure 29: COM lead connection PCB layout example
A rule of thumb for the value of this bypass capacitor is to
keep its minimum value at least 2500 times the value of the
total input capacitance (Ciss) of the power transistors being
driven. This decoupling capacitor can be split between a
higher valued electrolytic type and a lower valued ceramic
type connected in parallel, although a good quality electro-
lytic (e.g., 10 μ F) placed immediately adjacent to the VCC
and COM terminals will work well.
In a typical application circuit, the supply voltage to the IC is
normally derived by means of a high value startup resistor
(1/4W) from the rectified line voltage, in combination with a
charge pump from the output of the half-bridge. With this
type of supply arrangement, the internal 15.6V zener clamp
diode from VCC to COM will determine the steady state IC
supply voltage.
30
These connection techniques prevent high current ground
loops from interfering with sensitive timing component op-
eration, and allows the entire control circuit to reject com-
mon-mode noise due to output switching.
www.irf.com
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