IR3081
Page 12 of 20
9/1/03
The IR3081 can accept changes in the VID code while operating and vary the DAC voltage accordingly. The
sink/source capability of the VDAC buffer amp is programmed by the same external resistor that sets the oscillator
frequency. The slew rate of the voltage at the VDAC pin can be adjusted by an external capacitor between VDAC
pin and the VOSNS- pin. A resistor connected in series with this capacitor is required to compensate the VDAC
buffer amplifier. Digital VID transitions result in a smooth analog transition of the VDAC voltage and converter
output voltage minimizing inrush currents in the input and output capacitors and overshoot of the output voltage.
It is desirable to prevent negative inductor currents in response to a request for a lower VID code. Negative current
transforms the buck converter into a boost converter and transfers energy from the output capacitors back into the
input voltage. This energy can cause voltage spikes and damage the silver box or other components unless they
are specifically designed to handle it. Furthermore, power is wasted during the transfer of energy from the output
back to the input.
The IR3081 includes circuitry that turns off both control and synchronous MOSFETs in response to a lower VID
code so that the load current discharges the output capacitors instead of the inductors. A lower VID code is
detected by the VID step-down detect comparator which monitors the “fast” output of the DAC (plus 7mV for noise
immunity) compared to the “slow” output of the VDAC pin. If a dynamic VID step down is detected, the body brake
latch is set and the output of the error amplifier is pulled down to 75% of the DAC voltage by the VID body brake
clamp. This triggers the Body Braking
function in the phase ICs causing them to turn off both their drivers.
The converter’s output voltage needs to be monitored and compared to the VDAC voltage to determine when to
resume normal operation. Unfortunately, the voltage on the FB pin can be pulled down by its compensation network
during the sudden decrease in the Error Amp’s output voltage so an additional pin BBFB is provided. The BBFB pin
is connected to the converter output voltage and VDRP pin with resistors of the same value as on the FB pin and
therefore provides an un-corrupted representation of converter output voltage. The regulation detect comparator
compares the BBFB to the VDAC voltage and resets the body brake latch releasing the error amp’s output and
allowing normal operation to resume. Body Braking
during a transition to a lower VID code can be disabled by
connecting the BBFB pin to ground.