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参数资料
| 型号： | IR3081 |
| 厂商： | International Rectifier |
| 英文描述： | XPHASE VR 10.0 CONTROL IC |
| 中文描述： | XPHASE村10.0控制IC |
| 文件页数： | 16/20页 |
| 文件大小： | 396K |
| 代理商： | IR3081 |
IR3081
Page 16 of 20
9/1/03
The IR3081 has a programmable soft-start function to limit the surge current during the converter start-up. A
capacitor connected between the SS/DEL and LGND pins controls soft start as well as over-current protection delay
and hiccup mode timing. A charge current of 66uA and discharge current of 6uA control the up slope and down
slope of the voltage at the SS/DEL pin respectively
Figure 11 depicts the various operating modes as controlled by the SS/DEL function. If there is no fault, the SS/DEL
pin will begin to be charged. The error amplifier output is clamped low until SS/DEL reaches 1.3V. The error
amplifier will then regulate the converter’s output voltage to match the SS/DEL voltage less the 1.3V offset until it
reaches the level determined by the VID inputs. The SS/DEL voltage continues to increase until it rises above 3.91V
and allows the PWRGD signal to be asserted. SS/DEL finally settles at 4V, indicating the end of the soft start.
Under Voltage Lock Out and VID=11111x faults as well as a low signal on the ENABLE input immediately sets the
fault latch causing SS/DEL to begin to discharge. The SS/DEL capacitor will continue to discharge down to 0.2V. If
the fault has cleared the fault latch will be reset by the discharge comparator allowing a normal soft start to occur.
A delay is included if an over-current condition occurs after a successful soft start sequence. This is required since
over-current conditions can occur as part of normal operation due to load transients or VID transitions. If an over-
current fault occurs during normal operation it will initiate the discharge of the capacitor at SS/DEL but will not set
the fault latch immediately. If the over-current condition persists long enough for the SS/DEL capacitor to discharge
below the 90mV offset of the delay comparator, the Fault latch will be set pulling the error amp’s output low
inhibiting switching in the phase ICs and de-asserting the PWRGD signal. The delay can be reduced by adding a
resistor in series with the delay capacitor. The delay comparator’s offset voltage is reduced by the drop in the
resistor caused by the discharge current. To prevent the charge current from creating an offset exceeding the
SS/DEL to FB input offset voltage the value of the resistor should be 10K
or less to avoid interference with the soft
start function.
The SS/DEL capacitor will continue to discharge until it reaches 0.2V and the fault latch is reset allowing a normal
soft start to occur. If an over-current condition is again encountered during the soft start cycle the fault latch will be
set without any delay and hiccup mode will begin. During hiccup mode the 11 to 1 charge to discharge ratio results
in a 9% hiccup mode duty cycle regardless of at what point the over-current condition occurs.
If SS/DEL pin is pulled below 0.9V, the converter can be disabled.
Under Voltage Lockout (UVLO)
The UVLO function monitors the IR3081’s VCC supply pin and ensures that IR3081 has a high enough voltage to
power the internal circuit. The IR3081’s UVLO is set higher than the minimum operating voltage of compatible
Phase ICs thus providing UVLO protection for them as well. During power-up the fault latch is reset when VCC
exceeds 9.1V and there is no other fault. If the VCC voltage drops below 8.9V the fault latch will be set. For
converters using a separate 5V supply for gate driver bias an external UVLO circuit can be added to prevent
operation until adequate voltage is present. A diode connected between the 5V supply and the SS/DEL pin provides
a simple 5V UVLO function.
Over Current Protection (OCP)
The current limit threshold is set by a resistor connected between the OCSET and VDAC pins. If the IIN pin voltage,
which is proportional to the average current plus DAC voltage, exceeds the OCSET voltage, the over-current
protection is triggered.
VID = 11111X Fault
VID codes of 111111 and 111110 will set the fault latch and disable the error amplifier. An 800ns delay is provided
to prevent a fault condition from occurring during Dynamic VID changes.
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| IR3081M | XPHASE VR 10.0 CONTROL IC |
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| IR3088A | XPHASETM PHASE IC WITH FAULT AND OVERTEMP DETECT |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3081A | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASETM VR 10 CONTROL IC |
| IR3081AM | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASETM VR 10 CONTROL IC |
| IR3081AMPBF | 功能描述:IC CTRLR XPHASE VR10.0 28MLPQ RoHS:是 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:XPhase™ 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| IR3081AMPBF | 制造商:International Rectifier 功能描述:Controller IC Package/Case:28-MLPQ |
| IR3081AMTR | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASETM VR 10 CONTROL IC |
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