参数资料
型号: IR3082AMPBF
厂商: International Rectifier
文件页数: 11/33页
文件大小: 0K
描述: IC XPHASE CONTROL 9.6V 20-MLPQ
标准包装: 100
系列: XPhase™
应用: 处理器
电流 - 电源: 12mA
电源电压: 8.05 V ~ 16 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 20-MLPQ
供应商设备封装: 20-MLPQ(5x5)
包装: 剪切带 (CT)
IR3082A
IR3082A THEORY OF OPERATION
Block Diagram
The Block diagram of the IR3082A is shown in figure 7 and discussed in the following sections.
VCC
ENABLE
+
8.25 V
7.70V
-
-
+
-
+
VCC UVLO
COMPARATOR
ENABLE
COMPARATOR
0.22V
65mV
110mV
-
DISCHARGE
COMPARATOR
DELAY
COMPARATOR
FAULT
LATCH
S
R
-
+
VDRP
PWRGD
VDRP
+
+
+
OC
COMPARATOR
AMP
-
1.27V
1.21V
IHICCUP
-
VCHG
3.9V
ON
OC
DISCHG
CURRENT
35uA
ON
SS/DEL
DISCHARGE
450ns
BLANKING
DISABLE
IIN
OCSET
IDISCHG
5uA
ICHG
OFF
1.3V
EAOUT
55uA
ERROR
SS/DEL
SOFTSTART
AMP
FB
CLAMP
+
VID4
VID3
VID2
VID1
VID0
VID INPUT
COMPARATORS
(1 OF 5
SHOWN)
DIGITAL TO
ANALOG
CONVERTER
"FAST"
+
IOCSET IROSC
IFB
IROSC
LGND
VOSNS-
+
-
1.22V
-
VDAC
-
ISOURCE
ISINK
VDAC
BUFFER
VDAC
AMP
RMPOUT
50%
DUTY
CYCLE
RAMP GENERATOR
5.0V
IROSC
VBIAS
REGULATOR
VBIAS
1.0V
VBIAS
+
6.3V
-
ROSC
BUFFER
AMP
CURRENT
SOURCE
GENERATOR
ROSC
Figure 7 – IR3082A Block Diagram
VID Control
A 5-bit VID voltage compatible with AMD’s Opteron/Athlon64, as shown in Table 1, is available at the VDAC pin.
The VID pins require an external bias voltage and should not be floated. The VID input comparators, with 1.2V
reference, monitor the VID pins and control the 6 bit Digital-to-Analog Converter (DAC) whose output is sent to the
VDAC buffer amplifier. The output of the buffer amp is the VDAC pin. The VDAC voltage is trimmed to compensate
for the input offsets of the Error Amp to provide 1% system set-point accuracy and is pre-positioned 50mV higher
than Vout listed in Table1 for load positioning. The actual VDAC voltage does not determine the system accuracy
and has a wider tolerance.
The IR3082A can accept changes in the VID code while operating and vary the DAC voltage accordingly. The
sink/source capability of the VDAC buffer amp is programmed by the same external resistor that sets the oscillator
frequency. The slew rate of the voltage at the VDAC pin can be adjusted by an external capacitor between VDAC
pin and the VOSNS- pin. A resistor connected in series with this capacitor is required to compensate the VDAC
buffer amplifier. Digital VID transitions result in a smooth analog transition of the VDAC voltage and converter
output voltage minimizing inrush currents in the input and output capacitors and overshoot of the output voltage.
Page 11 of 33
05/02/2006
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