参数资料
型号: IR3093MTRPBF
厂商: International Rectifier
文件页数: 16/39页
文件大小: 0K
描述: IC CTLR 3PHASE VR10 48-MLQP
标准包装: 3,000
应用: VID 电压编程器
电源电压: 7.4 V ~ 21 V
电流 - 电源: 38mA
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 48-MLPQ
供应商设备封装: 48-MLPQ(7x7)
包装: 带卷 (TR)
IR3093PbF
APPLICATIONS INFORMATION
VIN
CIN
GNDIN
ENABLE
OVP
VID5
VID0
VID1
VID2
VID3
VID4
U13
C5VREF
CBST1
VIN
1
RCS1
CCS1
2
COUT
VOUT SENSE+
VOUT+
VOUT-
RFB
RCOMP
CDAC
RDAC
RDRP
CCOMP
Csense-
RROSC
ROCSET
CSC2 CSC3
CSS
RSC2 RSC3
VID3
VID4
ROSC
VOSNS-
OCSET
VDAC
VDRP
FB
EAOUT
SS/DEL
SCOMP2
SCOMP3
VIN
RSET
CVCC
IR3093
48LD MLPQ
GATEH1
PGND1
GATEL1
VCCL1_2
5VUVL
GATEL2
PGND2
GATEH2
VCCH2
VCCH3
GATEH3
PGND3
IR3093
CBIAS
CBST3
CBST2
VIN
1
VIN
1
2
RCS2
2
CCS2
VOUT SENSE-
RCS3
CCS3
POWERGOOD
Figure 6 – System Diagram
VID Control
The IR3093 provides three different microprocessor solutions. The VID_SEL pin selects the appropriate Digital-to-
Analog Converters (DAC), VID threshold voltages, and Over Voltage Protection (OVP) threshold for either VR-10.0,
OPTERON, or ATHLON solutions. Reference voltages are shown in Table 1. The DAC output voltage is available
at the VDAC pin. A detailed block diagram of the VID control circuitry can be found in Figure 7. The VID pins are
internally pulled up to 4.9V by 18uA current sources. The VID input comparators have a 0.6V threshold for VR-10.0
or 1.65V threshold for OPTERON and ATHLON. The selected DAC voltage is provided at the Error Amplifier
positive input and to the VDAC pin by the trans-conductance DAC Buffer.
The VDAC voltage is trimmed to the Error Amplifier output voltage with EAOUT tied to FB via an accurate resistor.
This compensates DAC Buffer input offset, Error Amplifier input offset, and errors in the generation of the FB bias
current which is based on R ROSC . This trim method provides a 0.5% system accuracy.
The IR3093 can accept changes in the VID code while operating and vary the VDAC voltage accordingly. The
IR3093 detects a VID change and blanks the DAC output response for 400ns to verify the new code is valid and not
due to skew or noise. The sink/source capability of the VDAC buffer amp is programmed by the same external
resistor that sets the oscillator frequency, R ROSC . The slew rate of the voltage at the VDAC pin can be adjusted by an
external capacitor between VDAC pin and the VOSNS- pin. A resistor connected in series with this capacitor is
Page 16 of 39
09/08/05
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