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参数资料
| 型号： | IR3220STR |
| 厂商： | International Rectifier |
| 文件页数： | 3/15页 |
| 文件大小： | 0K |
| 描述： | IC H-BRIDGE 45V 6A 20SOIC |
| 标准包装： | 1,000 |
| 类型： | 半桥 |
| 输入类型： | 非反相 |
| 输出数： | 4 |
| 导通状态电阻： | 11 毫欧 |
| 电流 - 输出 / 通道： | 2A |
| 电流 - 峰值输出： | 15A |
| 电源电压： | 8 V ~ 28 V |
| 工作温度： | -40°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC（宽型） |
| 包装： | 带卷 (TR) |
IR3220S
Soft-Start Sequence
IN1
(IN2)
SS
M1-M2
(M2-M1)
Vss+
Vss-
Duty cycle modulation follows SS voltage
Tss ( approximately 1.4 x RC time constant )
Trd
t
t
t
Truth Table
IN1 IN2
L L
L H
L H
H L
H L
H H
MODES
Stand-by with braking - sleep mode**
Forward rotation (normal operation)
Forward rotation (protection triggered)
Reverse rotation (normal operation)
Reverse rotation (protection triggered)
Stand-by without braking
DG
H
H
L
H
L
H
HS1
OFF
OFF
OFF
ON
OFF
OFF
LSS1
ON
ON*
ON*
OFF
OFF
OFF
HS2
OFF
ON
OFF
OFF
OFF
OFF
LSS2
ON
OFF
OFF
ON*
ON*
OFF
SS reset
ON
OFF
OFF
OFF
OFF
ON
* During Soft-start sequence, the low side part is switching.
** Protections are reset in this mode
The IR 3220S over-current is set at 30A which is low enough to protect the whole application. The soft-start RC
time constant has to be designed in order to keep the maximum in-rush current below the I shutdown (application
worst case - see AN 1032 ). The total switching sequence is about 1.4 times the RC time constant. A smoother
start-up is even achievable by slightly increasing the RC values. However, the soft-start sequence should
remain short enough not to trip the over-temperature protection (Tj while free-wheeling). The truth table shows
that the soft-start sequence can be interrupted at any time. But a minimum time is needed prior to any change
in the direction or re-start of a new SS sequence. Actually, the capacitor of the RC network has to be discharged
and the motor fully stopped first otherwise the over-current protection might trip during the next turn-on.
The protections turn off the high side MOSFETs so that no braking sequence follows the fault detection. Both
IN1 and IN2 have to go low for a minimum time in order to reset the fault circuitry. When both inputs are back
to the low level, the H-bridge is in the braking mode and the motor shorted. In this mode, no protection is
activated and the peak current due to the braking is not monitored. After 300 ms, the I.C sleep mode is
activated and the consumption is reduced down to few micro-amps. The low side gate drivers keep the gates
high so the motor remains shorted. When using end switches, the I.C goes into the low consumption mode as
soon as the mechanical stop are reached. When interfacing such switches directly to the IR 3220S, de-bounc-
ing RC networks have to be implemented on the input pins in order to prevent false over-current detection.
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