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参数资料
| 型号： | IR3500MTRPBF |
| 厂商： | International Rectifier |
| 英文描述： | XPHASE3TM VR11.0 & AMD PVID CONTROL IC |
| 中文描述： | XPHASE3TM VR11.0 |
| 文件页数： | 13/47页 |
| 文件大小： | 778K |
| 代理商： | IR3500MTRPBF |
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IR3500
Page 13 of 47
June 12, 2007
Average Current Share Loop
Current sharing between phases of the converter is achieved by the average current share loop in each phase IC.
The output of the current sense amplifier is compared with average current at the share bus. If current in a phase is
smaller than the average current, the share adjust amplifier of the phase will pull down the starting point of the PWM
ramp thereby increasing its duty cycle and output current; if current in a phase is larger than the average current,
the share adjust amplifier of the phase will pull up the starting point of the PWM ramp thereby decreasing its duty
cycle and output current. The current share amplifier is internally compensated so that the crossover frequency of
the current share loop is much slower than that of the voltage loop and the two loops do not interact.
IR3500 THEORY OF OPERATION
Block Diagram
The Block diagram of the IR3500 is shown in Figure 8, and specific features are discussed in the following sections.
VID Control
The AMD 6-bit VID, VR11 8-bit VID, and AMD Opteron 5-bit VID are shown in Tables 2 to 4 respectively, and are
selected by different connections of VIDSEL pin shown in Table 1. The VID pins require an external bias voltage
and should not be floated. The VID input comparators monitor the VID pins and control the Digital-to-Analog
Converter (DAC) whose output is sent to the VDAC buffer amplifier. The output of the buffer amplifier is the VDAC
pin. The VDAC voltage, input offsets of error amplifier and remote sense differential amplifier are post-package
trimmed to provide 0.5%
system set-point
accuracy. The actual VDAC voltage does not determine the system
accuracy, which has a wider tolerance.
VIDs of less than 0.5V are not supported.
The IR3500 can accept changes in the VID code while operating and vary the DAC voltage accordingly. The slew
rate of the voltage at the VDAC pin can be adjusted by an external capacitor between VDAC pin and LGND pin. A
resistor connected in series with this capacitor is required to compensate the VDAC buffer amplifier. Digital VID
transitions result in a smooth analog transition of the VDAC voltage and converter output voltage minimizing inrush
currents in the input and output capacitors and overshoot of the output voltage.
Adaptive Voltage Positioning
Adaptive voltage positioning is needed to reduce the output voltage deviations during load transients and the power
dissipation of the load at heavy load. The circuitry related to voltage positioning is shown in Figure 9. The output
voltage is set by the reference voltage VSETPT at the positive input to the error amplifier. This reference voltage
can be programmed to have a constant DC offset bellow the VDAC by connecting RSETPT between VDAC and
VSETPT. The IVSETPT is controlled by the ROSC as shown in Figure 24.
The voltage at the VDRP pin is a buffered version of the share bus IIN and represents the sum of the DAC voltage
and the average inductor current of all the phases. The VDRP pin is connected to the FB pin through the resistor
R
DRP
. Since the error amplifier will force the loop to maintain FB to be equal to the VSETPT, an additional current
will flow into the FB pin equal to (VDRP-VSETPT) / R
DRP
. When the load current increases, the adaptive positioning
voltage increases accordingly. More current flows through the feedback resistor R
FB
, and makes the output voltage
lower proportional to the load current. The positioning voltage can be programmed by the resistor R
DRP
so that the
droop impedance produces the desired converter output impedance. The offset and slope of the converter output
impedance are referenced to and therefore independent of the VDAC voltage.
Inductor DCR Temperature Compensation
A negative temperature coefficient (NTC) thermistor should be used for inductor DCR temperature compensation.
The thermistor should be placed close to the inductor and connected in parallel with the feedback resistor, as
shown in Figure 10. The resistor in series with the thermistor is used to reduce the nonlinearity of the thermistor.
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| IR4426 | DUAL LOW SIDE DRIVER |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3500V | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM VR11.1 CPU VTT CONTROL IC |
| IR3500VMPBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM VR11.1 CPU VTT CONTROL IC |
| IR3500VMTRPBF | 功能描述:开关变换器、稳压器与控制器 X-PHASE IR3500V AMD SVID CTRL IC RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel |
| IR3502 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM CONTROL IC |
| IR3502_09 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM CONTROL IC |
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