参数资料
型号: IR3508MTRPBF
厂商: International Rectifier
文件页数: 7/19页
文件大小: 0K
描述: IC XPHASE3 CTLR 20-MLPQ
标准包装: 3,000
系列: XPhase3™
应用: 处理器
电流 - 电源: 4mA
电源电压: 8 V ~ 28 V
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 20-MLPQ
供应商设备封装: 20-MLPQ(4x4)
包装: 带卷 (TR)
The PWM block diagram of the XPhase3
architecture is shown in Figure 1. Feed-forward voltage mode control with
IR3508
SYSTEM THEORY OF OPERATION
System Description
The system consists of one control IC and a scalable array of phase converters, each requiring one phase IC. The
control IC communicates with the phase ICs using three digital buses, i.e., CLOCK, PHSIN, PHSOUT and three analog
buses, i.e., DAC, EA, and IOUT. The digital buses are responsible for switching frequency determination and accurate
phase timing control without any external components. The analog buses are used for PWM control and current sharing
between interleaved phases. The control IC incorporates all the system functions, i.e., VID, CLOCK signals, error
amplifier, fault protections, current monitor, etc. The Phase IC implements the functions required by the converter of
each phase, i.e., the gate drivers, PWM comparator and latch, over-voltage protection, phase disable circuit, current
sensing and sharing, etc.
PWM Control Method
TM
trailing edge modulation is used. A high-gain and wide-bandwidth voltage type error amplifier is implemented in the
controller’s design to achieve a fast voltage control loop. Input voltage is sensed by the phase ICs to provide feed-
forward control. The feed-forward control compensates the ramp slope based on the change in input voltage. The input
voltage can change due to variations in the silver box output voltage or due to the wire and PCB-trace voltage drop
related to changes in load current.
CONTROL IC
CLOCK GENERATOR
CLKOUT
GATE DRIVE
VOLTAGE
PHSOUT
CLKIN
CLK Q
D
PHASE IC
VCC
VCCH
VIN
REMOTE SENSE
AMPLIFIER
PHSOUT
PHSIN
VO
PHSIN
EAIN
1
PWM
COMPARATOR
-
+
ENABLE
VID6
RAMP
DISCHARGE
2
RESET
DOMINANT
D Q
CLK Q
DFFRH
PWM LATCH
BODY
BRAKING
COMPARATOR
VID6
OFF
VID6
OFF
GATEH
SW
VCCL
GATEL
PGND
CBST
COUT
VOSNS+
VOUT
GND
VOSNS-
CLAMP
VDAC
LGND
SHARE ADJUST
ERROR AMPLIFIER
PSI
PSI
VDAC
ERROR
AMPLIFIER
EAOUT
RCOMP
RFB1
RFB
IOUT
3K
-
VID6
VID6
+
VID6
VID6 +
+
CURRENT
SENSE
AMPLIFIER
CSIN+
CSIN-
CCS
RCS
FB
CCOMP
CFB
DACIN
IVSETPT
IROSC
RVSETPT
VSETPT
RDRP1
CDRP
RDRP
PHSOUT
PHASE IC
IMON
CLKIN
CLK Q
VCC
VDRP
AMP
VDAC
Thermal
Compensation
VDRP
VN
RTHRM
PHSIN
EAIN
D
1
PWM
COMPARATOR
-
+
2
RESET
U248
DOMINANT
D Q
CLK Q
DFFRH
PWM LATCH
VID6
OFF
VCCH
GATEH
SW
VCCL
CBST
IIN
ENABLE
VID6
BODY
GATEL
RAMP
DISCHARGE
CLAMP
SHARE ADJUST
BRAKING
COMPARATOR
VID6
OFF
PGND
PSI
PSI
ERROR AMPLIFIER
ISHARE
3K
-
VID6
VID6
+
CURRENT
SENSE
AMPLIFIER
CSIN+
VID6
VID6 +
+
DACIN
Figure 1: PWM Block Diagram
CSIN-
CCS
RCS
Page 7 of 19
October 27, 2008
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