参数资料
型号: IR3621MPBF
厂商: International Rectifier
文件页数: 14/29页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 32MLPQ
标准包装: 73
PWM 型: 电压模式
输出数: 2
频率 - 最大: 345kHz
占空比: 86.5%
电源电压: 5.5 V ~ 14.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 32-VFQFN 裸露焊盘
包装: 管件
配用: IRDC3621-ND - BOARD EVAL DUAL SYNC BUCK CTRLR
IR3621 & (PbF)
Feedback Compensation
The IR3621 is a voltage mode controller; the control loop
is a single voltage feedback path including error ampli-
The ESR zero of the output capacitor is expressed as
follows:
fier and error comparator. To achieve fast transient re-
sponse and accurate output regulation, a compensation
circuit is necessary. The goal of the compensation net-
F ESR =
1
2 π× ESR × Co
---(10A)
work is to provide a closed loop transfer function with
the highest 0dB crossing frequency and adequate phase
margin (greater than 45 ).
V OUT
R 9 Fb
The output LC filter introduces a double pole, –40dB/
decade gain slope above its corner resonant frequency,
and a total phase lag of 180 (see Figure 14). The Reso-
nant frequency of the LC filter is expressed as follows:
R 5
Vp=V REF
E/A
Comp
C 9
R 4
Ve
C POLE
1
F LC = ---(10)
2 π× L O × C O
Where: Lo is the output inductor
For 2-phase application, the effective output
inductance should be used
Gain(dB)
H(s) dB
Co is the total output capacitor
F Z
Frequency
Figure 15 - Compensation network without local
Figure 14 shows gain and phase of the LC filter. Since
we already have 180 phase shift just from the output
filter, the system risks being unstable.
feedback and its asymptotic gain plot.
The transfer function (Ve / V OUT ) is given by:
Gain
Phase
(
)
0dB
-40dB/decade
0
H(s) = g m ×
R 5
R 9 + R 5
×
1 + sR 4 C 9
sC 9
---(11)
The (s) indicates that the transfer function varies as a
F LC Frequency
-180
F LC
Frequency
function of frequency. This configuration introduces a gain
and zero, expressed by:
Figure14 - Gain and phase of LC filter
F Z =
× R 4
The IR3621’s error amplifier is a differential-input transcon-
ductance amplifier. The output is available for DC gain
control or AC phase compensation.
The E/A can be compensated with or without the use of
|H(s=j × 2 π× F O )| = g m ×
1
2 π× R 4 × C 9
R 5
R 9 +R 5
---(13)
---(12)
local feedback. When operated without local feedback,
the transconductance properties of the E/A become evi-
dent and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC circuit
from Comp pin to ground as shown in Figure 15.
Note that this method requires the output capacitor to
have enough ESR to satisfy stability requirements. In
general, the output capacitor’s ESR generates a zero
typically at 5kHz to 50kHz which is essential for an ac-
ceptable phase margin.
|H(s)| is the gain at zero cross frequency.
First select the desired zero-crossover frequency (F O1 ):
F O1 > F ESR and F O1 ≤ (1/5 ~ 1/10) × f S
14
www.irf.com
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