参数资料
型号: IR3628MPBF
厂商: International Rectifier
文件页数: 14/22页
文件大小: 0K
描述: IC CTLR PWM BUCK SYNC 12-MLPD
标准包装: 122
应用: 控制器,DDR
输入电压: 4.5 V ~ 14 V
输出数: 1
输出电压: 0.6 V ~ 9.94 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 12-VFDFN 裸露焊盘
供应商设备封装: 12-MLPD
包装: 管件
IR3628MP b F
Feedback Compensation
The IR3628 is a voltage mode controller; the
The ESR zero of the output capacitor expressed
as follows:
control loop is a single voltage feedback path
including error amplifier and error comparator. To
achieve fast transient response and accurate
V O UT
F ESR =
1
2 ? π * ESR * C o
- - - (12)
output regulation, a compensation circuit is
necessary. The goal of the compensation
network is to provide a closed loop transfer
function with the highest 0dB crossing frequency
and adequate phase margin (greater than 45 o ).
The output LC filter introduces a double pole, –
R 8
R 9
F b
V REF
E/A
Comp
C 4
R 3
Ve
C POLE
40dB/decade gain slope above its corner
resonant frequency, and a total phase lag of 180 o
(see figure 13). The resonant frequency of the LC
filter expressed as follows:
Gain(dB)
H(s) dB
F Z
F LC =
1
2 ? π L o ? C o
- - - (11)
Frequency
Fig. 14: TypeII compensation network
H ( s ) = ? ? g m *
? *
R 9 + R 8 ? ?
Figure 13 shows gain and phase of the LC filter.
Since we already have 180 o phase shift just from
the output filter, the system risks being unstable.
Gain Phase
and its asymptotic gain plot
The transfer function (Ve/Vo) is given by:
? R 9 ? 1 + sR 3 C 4
- - - (13)
? sC 4
0dB
-40dB/decade
0
The (s) indicates that the transfer function varies
as a function of frequency. This configuration
introduces a gain and zero, expressed by:
[ H ( s ) ] = ? g m
? * R 3 - - - (14)
F LC Frequency
-180
F LC
Frequency
?
*
R 9 ?
R 9 + R 8 ? ?
Fig. 13: Gain and Phase of LC filter
F z =
1
2 π * R 3 * C 4
- - - (15)
V osc * F o * F ESR * ( R 8 + R 9 ) * 1 . 28
The IR3628’s error amplifier is a differential-input
transconductance amplifier. The output is
available for DC gain control or AC phase
compensation.
The error amplifier can be compensated either in
type II or typeIII compensation. When it is used in
typeII compensation the transconductance
properties of the error amplifier become evident
and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC
circuit from Comp pin to ground as shown in
figure 14.
This method requires that the output capacitor
should have enough ESR to satisfy stability
requirements. In general the output capacitor’s
ESR generates a zero typically at 5kHz to 50kHz
which is essential for an acceptable phase
margin.
08/10/2007
The gain is determined by the voltage divider and
error amplifier’s transconductance gain.
First select the desired zero-crossover frequency
(Fo):
F o > F ESR and F o ≤ ( 1/5 ~ 1/10 ) * F s
Use the following equation to calculate R3:
R 3 = - - - (15A)
V in * F LC 2 * R 9 * g m
Where:
V in = Maximum Input Voltage
V osc = Oscillator Ramp Voltage
F o = Crossover Frequency
F ESR = Zero Frequency of the Output Capacitor
F LC = Resonant Frequency of the Output Filter
R 8 and R 9 = Feedback Resistor Dividers
g m = Error Amplifier Transconductance
1.28 = Empirical number to compensate thermal,
process variations and components tolerances
14
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