参数资料
型号: IR3710MTRPBF
厂商: International Rectifier
文件页数: 12/20页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 16-MLPQ
标准包装: 3,000
PWM 型: 控制器
输出数: 1
频率 - 最大: 1MHz
电源电压: 3 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 125°C
封装/外壳: 16-MLPQ
包装: 带卷 (TR)
IR3710MTRPBF
W ON =
?
CHARGE PUMP
The purpose of the charge pump is to improve the
system efficiency. A combination of VCC, V5 and
three(3) external components are used to boost
V IN ? I PK
2
P SW = W ON ? F S =
( t3 - t1 ) (4)
V IN ? I PK
2
Q GS2
+ Q GD
I GDr
? F S (5)
PVCC up to V CP TH . PVCC drives the synchronous
MOSFET and reduces the R DSON when compared to
a regular 5V rail driver. The lower R DSON reduces the
conduction power loss as discussed in the Power
Loss section.
The charge pump is continuously enabled for FCCM
= HIGH. The charge pump circuit is disabled when
FCCM = LOW and the output loading is less than half
of inductor current ripple. In this case, PVCC is two
(2) diode voltage away from V5 rail. Therefore, the
power loss for driver is reduced. The charge pump
Fs is the switching frequency. I GDr is gate driver
current. To find the driver current, Figure 20 shows
the simplified circuit of driver and MOSFET. I Gdr can
be found by using Ohm’s law as shown in the
equation 6 with an assumption that V Qgd is the gate
voltage during t 2 and t 3 . Therefore, the turn on
switching power loss of a cycle can be easily be
found as shown in equation 7.
circuit stops switching the CPO pin for PVCC above
V CP TH .
It is not recommended to use PVCC for supply power
to boot capacitor when use charge pump circuit. This
can be exceeding the maximum rating of BOOT to
I Gdr
V IN
I PK
I OUT
V GS
PHASE pins and damages to the IC.
POWER UP SEQUENCE
With EN pin HIGH, IR3710 initiates a soft start when
V GS(th)
the VCC and PVCC are in the above ULVO threshold
and V IN is in normal range. The order of VCC, PVCC
and V IN is not require.
Q GS1
Q GS2
t 2
Q GD
t
COMPONENT SELECTION
Selection of components for the converter is an
iterative process which involves meeting the
t 1 t 3
Figure 19. Typical Turn-On Waveform.
specifications and trade-offs between the
performance and cost. The following sections will
guide one through the process.
Driver
V DR
MOSFET
Power Loss
The main sources contributing to the power loss of a
converter are switching loss of the upper MOSFETs,
conduction loss of the lower MOSFETs, AC and DC
losses in the inductor, and driving loss which is a
large factor at light load condition.
In small duty cycle converter system, switching loss
R PU
R PD
R EXT
C GD
R G
C GS
V Qgd
C DS
is main power loss of upper MOSFETs because its
on-time is relatively small. To find the switching
power loss, Figure 19 shows the typical turn-on
waveform of the upper MOSFETs. Turn-off is
quantitatively similar with x-axis reversed. The
Figure 20. Simplify Driver and MOSFET Circuit.
switching loss can be estimate as the cross sectional
area in the figure. Equation 4 and 5 show the
relationship of MOSFET’s switching charge and loss.
I GDr(on - time) =
I GDr(off - time) =
V DR - V Qgd
R PU + R EXT + R G
V Qgd
R PD + R EXT + R G
(6a)
(6b)
P SW =
V IN ? I PK
2
?
Q GS2 + Q GD
I GDr(on - time)
? F S (7)
The reverse recovery power loss of the lower
MOSFETs is also a factor of the upper MOSFET’s
Page 12 of 20
www.irf.com
IR Confidential
4/26/10
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