参数资料
型号: IR3832WMTR1PBF
厂商: International Rectifier
文件页数: 16/32页
文件大小: 0K
描述: IC REG SYNC BUCK 4A DDR 15-QFN
特色产品: Gen2.1 SupIRBuck? Integrated Voltage Regulators
标准包装: 1
系列: SupIRBuck™
应用: 转换器,DDR
输入电压: 1.5 V ~ 16 V
输出数: 1
输出电压: 0.6 V ~ 14.4 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 15-PowerVQFN
供应商设备封装: PQFN(5x6)
包装: 标准包装
其它名称: IR3832WMTR1PBFDKR
PD-97508
IR3832WMPbF
Minimum on time Considerations
The minimum ON time is the shortest amount of
time for which the Control FET may be reliably
turned on, and this depends on the internal
timing delays. For the IR3832W, the typical
minimum on-time is specified as 50 ns.
Any design or application using the IR3832W
must ensure operation with a pulse width that is
higher than this minimum on-time and preferably
higher than 100 ns. This is necessary for the
circuit to operate without jitter and pulse-
skipping, which can cause high inductor current
ripple and high output voltage ripple.
Maximum Duty Ratio Considerations
A fixed off-time of 200 ns maximum is specified
for the IR3832W. This provides an upper limit on
the operating duty ratio at any given switching
frequency. It is clear, that higher the switching
frequency, the lower is the maximum duty ratio at
which the IR3832W can operate. To allow a
margin of 50ns, the maximum operating duty
ratio in any application using the IR3832W
should still accommodate about 250 ns off-time.
Fig 9. shows a plot of the maximum duty ratio v/s
the switching frequency, with 250 ns off-time.
t on =
=
D
F s
V out
V in × F s
95
90
85
80
75
M a x Duty Cycle
In any application that uses the IR3832W, the
following condition must be satisfied:
t on (min) ≤ t on
70
65
60
55
250
450
650
850
1050
1250
1450
1650
∴ t on (min) ≤
∴ V in × F s ≤
V out
V in × F s
V out
t on (min)
The minimum output voltage for the IR3832W is
limited to V out(min) = 0.6 V.
S w itching Frequency (kH z )
Fig. 9. Maximum duty cycle v/s switching
frequency.
∴ V in × F s ≤
V out (min)
t on (min)
∴ V in × F s ≤
0.6 V
100 ns
= 6 × 10 6 V/s
Furthermore, for the IR3832W, especially for
active bus termination applications, it is strongly
recommended to use a switching frequency of
400 kHz to obtain clean and jitter free operation
in sourcing as well as sinking modes. Therefore,
the maximum input voltage that may be stepped
down to 0.6V at 400 kHz without jitter or pulse
skipping is 15 V.
Rev 6.0
16
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