参数资料
型号: IR3853MTR1PBF
厂商: International Rectifier
文件页数: 23/35页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 4A PQFN17
产品培训模块: SupIRBuck? Family and POL Design Tools Overview
标准包装: 1
系列: SupIRBuck™
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.7 V ~ 18.9 V
输入电压: 1.5 V ~ 21 V
PWM 型: 电压模式
频率 - 开关: 225kHz ~ 1.65MHz
电流 - 输出: 4A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 17-PowerVQFN
包装: 标准包装
供应商设备封装: 17-PQFN(4x5)
其它名称: IR3853MTR1PBFDKR
PD-97516
IR3853MPbF
Z I N
V OUT
C 3
Compensator
Type
F ESR vs F o
Output
Capacitor
C 7
R 10
R 8
R 3
C 4
Z f
Type II
F LC <F ESR <F o <F s /2
Electrolytic
Tantalum
R 9
Fb
E/A
Comp
Ve
Type III
F LC <F o <F ESR
Tantalum
Ceramic
Gain(dB)
H(s) dB
V REF
The higher the crossover frequency, the
potentially faster the load transient response.
However, the crossover frequency should be low
enough to allow attenuation of switching noise.
Typically, the control loop bandwidth or crossover
frequency is selected such that
F Z 1
F Z 2
F P 2
F P 3
Frequency
F o ≤ ( 1/5 ~ 1/10 ) * F s
F P 2 =
.......... .......... .......... .......... ...(28 )
F P 3 =
?
.......... .. (29)
2 π * R 3 ? ?
? ?
F Z 1 =
.......... .......... .......... ....... ........(3 0)
F Z 2 =
?
.......... (31)
F o = R 3 * C 7 *
V in 1
2 π * L o * C o
Fig.16. Type III Compensation network and
its asymptotic gain plot
The compensation network has three poles and
two zeros and they are expressed as follows:
F P 1 = 0 .......... .......... .......... .......... .......... .......... ..(27)
1
2 π * R 10 * C 7
1 1
? C 4 * C 3 ? 2 π * R 3 * C 3
? C 4 + C 3 ?
1
2 π * R 3 * C 4
1 1
2 π * C 7 * ( R 8 + R 10 ) 2 π * C 7 * R 8
Cross over frequency is expressed as:
* .......... .......... ... (32)
V osc
Based on the frequency of the zero generated by
the output capacitor and its ESR, relative to
crossover frequency, the compensation type can
be different. The table below shows the
compensation types for relative locations of the
crossover frequency.
Rev 4.0
The DC gain should be large enough to provide
high DC-regulation accuracy. The phase margin
should be greater than 45 o for overall stability.
For this design we have:
V in =12V
V o =1.8V
V osc =1.8V
V ref =0.7V
L o =1.5uH
C o =4x22uF, ESR=3mOhm each
It must be noted here that the value of the
capacitance used in the compensator design
must be the small signal value. For instance, the
small signal capacitance of the 22uF capacitor
used in this design (i.e. C3216X5R1E106M from
TDK) is 9.5uF at 1.8 V DC bias and 600 kHz
frequency. It is this value that must be used for all
computations related to the compensation. The
small signal value may be obtained from the
manufacturer’s datasheets, design tools or
SPICE models. Alternatively, they may also be
inferred from measuring the power stage transfer
function of the converter and measuring the
double pole frequency F LC and using equation
(16) to compute the small signal C o .
These result to:
F LC =21 kHz
F ESR =5.5 MHz
F s /2 =300 kHz
Select crossover frequency F o =100 kHz
Since F LC <F o <F s /2<F ESR , Type-III is selected to
place the pole and zeros.
23
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