参数资料
型号: IRAUDAMP4
厂商: International Rectifier
文件页数: 16/21页
文件大小: 0K
描述: KIT 2CH 120W HALF BRDG AUDIO AMP
标准包装: 1
放大器类型: D 类
输出类型: 2 通道(立体声)
在某负载时最大输出功率 x 通道数量: 170W x 2 @ 4 欧姆
电源电压: ±25 V ~ 35 V
工作温度: -40°C ~ 125°C
板类型: 完全填充
已用 IC / 零件: IRF6645,IRS20955
已供物品:
相关产品: IRF6645TRPBFDKR-ND - MOSFET N-CH 100V 5.7A DIRECTFET
IRF6645TR1PBFDKR-ND - MOSFET N-CH 100V 5.7A DIRECTFET
IRF6645TRPBFCT-ND - MOSFET N-CH 100V 5.7A DIRECTFET
IRF6645TR1PBFCT-ND - MOSFET N-CH 100V 5.7A DIRECTFET
IRF6645TRPBFTR-ND - MOSFET N-CH 100V 5.7A DIRECTFET
IRF6645TR1PBFTR-ND - MOSFET N-CH 100V 5.7A DIRECTFET
IRS20955(S)PbF
V + B ? 10 . 2 V [ Ω ]
Supplying V DD
V DD is designed to be supplied with an internal
Zener diode clamp. I DD , the supply current for V DD ,
can be estimated by:
I DD ≈ 1.5 mA x 300 x 10 -9 x switching frequency +
0.5 mA + 0.5 mA
(Dynamic power consumption)
(Static) (Zener bias)
The value of R DD used to supply I DD should meet the
following requirement:
R DD ≤
I DD
Example: In the case where the average PWM
switching frequency is 400 kHz, the required I DD is
1.18 mA. Based on this calculation, a 50 V power
supply voltage would require R DD to be 33 k Ω or
less.
Furthermore, make sure I DD is below the maximum
zener diode bias current, I DDZ , during static state
conditions.
The value of this charging resistor is subject to
several constraints:
- The minimum value of R CHARGE is limited by
the leakage current of the bootstrap voltage
supply through RCHARGE , which would limit
the maximum PWM modulation index of the
system.
- The maximum value of R CHARGE is limited by
the current charge capability of the resistor
during startup:
I CHARGE > I QBS
where I CHARGE = the current through
R CHARGE
I QBS = the high side quiescent
current.
≥ + B
I DDZ
V
? 10 . 2 V
Rdd
? 0 . 5 mA
Figure 19. Boot Strap Supply Pre-charging
Start-up Sequence (UVLO)
The protection control block in the IRS20955S
IRS20955S
Rdd
+B
monitors the status of V DD and V CC to ensure that
both voltage supplies are above the UVLO (under-
PWM
VDD
CSD
IN
VSS
NC
VREF
OCSET
DT
10.2V
CSH
VB
HO
VS
NC
VCC
LO
COM
Vcc
voltage lockout) threshold before beginning normal
operation. If either V DD or V CC is below the under
voltage threshold, LO and HO are disabled in
shutdown mode until both V DD and V CC rise above
the voltage threshold.
12V
-B
Figure 18. Supplying V DD
Charging V BS Prior to Start
The high-side bootstrap capacitor can be charged
through a resistor from the positive supply bus to the
V B pin by utilizing an internal 20.4 V Zener diode
between V B and V S . This scheme eliminates the
need to charge the boot strap capacitor through low-
side turn on during start-up.
www.irf.com
Power-down Sequence
As soon as V DD or V CC falls below the UVLO
threshold, protection logic in the IRS20955S turns
off LO and HO, shutting off the power MOSFETs.
Figure 20. IRS20955 UVLO Timing Chart
16
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