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参数资料
| 型号： | IRDC3870 |
| 厂商： | International Rectifier |
| 文件页数： | 16/20页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL REG SUPIRBUCK DC/DC |
| 产品变化通告： | (EP) Parts Discontinuation 25/May/2012 |
| 标准包装： | 1 |
| 系列： | * |
IR3870MPBF
This capacitor has 9m ? ESR which leaves
margin for the voltage drop of the ESL during
load step up. The typical ESL for this capacitor is
around 2nH. Refer to Output Capacitor Selection
section for all ceramic capacitor solution.
LAYOUT RECOMMENDATION
Bypass Capacitor:
One 1uF high quality ceramic capacitor should
be placed as near VCC pin as possible. The
other end of capacitor can be connected to a
via or connected directly to GND plane. Use a
GND plane instead of thin trace to the GND pin
because this thin traces have too much higher
impedance. A 1uF is recommended for both
V5 and PVCC and repeat the layout procedure
above for those signals.
Charge Pump:
We recommend that D1, D2 and C CPO be
placed as close to the CPO and PVCC pins as
possible. If those components can not be
placed on the same layer as IR3870, a
minimum of two vias are needed for the
connection of C CPO and CPO pin and the
connection of D2 and PVCC.
Boot Circuit:
C BOOT should be placed near the BOOT and
PHASE pins to reduce the impedance when the
The purpose of the tight loop from the input
ceramic capacitor is to suppress the high
frequency (10MHz range) switching noise and
reduce Electromagnetic Interference (EMI). If
this path has high inductance, the circuit will
cause voltage spikes and ringing, and increase
the switching loss. The off time path has low
AC and high average DC current. Therefore, it
should be laid out with a tight loop and wide
trace at both ends of the inductor. Lowering the
loop resistance reduces the power loss. The
typical resistance value of 1-ounce copper
thickness is 0.5m ? per square inch.
Figure 19. Current Path of Power Stage
upper MOSFET turns on. D BOOT does not need
to be close to C BOOT because the average
current to charge C BOOT is small during the on
time of lower MOSFET.
Power Stage:
Figure 19 shows the flowing current path for
the on and off periods. The on time path has
low average DC current with high AC current.
Therefore, it is recommended to place the input
ceramic capacitor, upper, and lower MOSFET
in a tight loop as shown in Figure 19.
16
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IRDC3871 | 功能描述:电源管理IC开发工具 USER GUIDE FOR IR3871 EVAL BRD RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| IRDC3876 | 制造商:International Rectifier 功能描述:9999V 999.000A POL IC - Rail/Tube 制造商:International Rectifier 功能描述:BOARD EVAL FOR IR3876 |
| IRDC3894 | 功能描述:电源管理IC开发工具 Design Kit Featuring IR3894M RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| IRDC3895 | 功能描述:电源管理IC开发工具 Design Kit Featuring IR3895M RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| IRDC3897 | 功能描述:电源管理IC开发工具 Design Kit POL IC RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
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