参数资料
型号: IRDCIP1201-A
厂商: International Rectifier
文件页数: 1/29页
文件大小: 0K
描述: BUCK CONV REF DESIGN KIT IP1201
标准包装: 1
系列: iPOWIR™
主要目的: DC/DC,步降
输出及类型: 2,非隔离
输出电压: 1.5V,2.5V
电流 - 输出: 15A,15A
输入电压: 3.14 ~ 5.5 V
稳压器拓扑结构: 降压
频率 - 开关: 300kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: iP1201
相关产品: IP1201TRPBF-ND - IC REG BUCK SYNC ADJ 30A 198BGA
IP1201PBF-ND - IC REG BUCK SYNC ADJ 30A 198BGA
IP1201TR-ND - IC REG BUCK SYNC ADJ 30A 198BGA
IP1201-ND - IC REG BUCK SYNC ADJ 30A 198BGA
其它名称: *IRDCIP1201-A
PD-94590B
iP1201
Dual Output Full Function 2 Phase
Synchronous Buck Power Block
Features
Integrated Power Semiconductors,
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3.14V to 5.5V input voltage
0.8V to 3.3V output voltage
2 Phase Synchronous Buck Power Block
180 ° out of phase operation
Single or Dual output capability
Dual 15A maximum load capability
Single 2 phase 30A maximum load capability
200-400kHz per channel nominal switching frequency
Over Current Hiccup or Over Current Latch
External Synchronization capability
Overvoltage protection
Independent soft start per output
Over Temperature protection
Internal features minimize layout sensitivity *
Very small outline 15.5mm x 9.25mm x 2.6mm
PWM Control & Passives
iP1201 Power Block
Description
The iP1201 is a fully optimized solution for medium current synchronous buck applications requiring up to 15A
or 30A. The iP1201 is optimized for 2 phase single output applications up to 30A or dual output, each up to
15A with interleaved input. It includes full function PWM control, with optimized power semiconductor chip-sets
and associated passives, achieving high power density. Very few external components are required to create
a complete synchronous buck power supply.
iPOWIR technology offers designers an innovative space-saving solution for applications requiring high power
densities. iPOWIR technology eases design for applications where component integration offers benefits in
performance and functionality. iPOWIR technology solutions are also optimized internally for layout, heat
transfer and component selection.
iP1201 Configurations
Channel 1
V IN
V OUT
V IN
V OUT
Channel 2
V OUT
Single Output
Dual Output
* Although, all of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR block, proper layout techniques should be applied
for the design of the power supply board. There are no concerns about unwanted shutdowns common to switching power supplies, if operated as specified. The iPOWIR block
will function normally, but not optimally without any additional input decoupling capacitors. Input decoupling capacitors should be added at Vin pin for stable and reliable long
term operation. See layout guidelines in datasheet for more detailed information.
www.irf.com
05/19/05
1
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