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参数资料
| 型号： | IRL3714ZSTRRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 8/13页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 20V 36A D2PAK |
| 标准包装： | 800 |
| 系列： | HEXFET® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 20V |
| 电流 - 连续漏极(Id) @ 25° C： | 36A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 16 毫欧 @ 15A，10V |
| Id 时的 Vgs(th)（最大）： | 2.55V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 7.2nC @ 4.5V |
| 输入电容 (Ciss) @ Vds： | 550pF @ 10V |
| 功率 - 最大： | 35W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | TO-263-3，D²Pak（2 引线+接片），TO-263AB |
| 供应商设备封装： | D2PAK |
| 包装： | 带卷 (TR) |
IRL3714Z/S/LPbF
Power MOSFET Selection for Non-Isolated DC/DC Converters
P loss = P conduction + P drive + P output
( )
P loss = I rms × R ds(on)
+ ? oss × V in × f + ( Q rr × V in × f )
Control FET
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called
the Control FET, are impacted by the R ds(on) of the
MOSFET, but these conduction losses are only about
one half of the total losses.
Power losses in the control switch Q1 are given
by;
P loss = P conduction + P switching + P drive + P output
This can be expanded and approximated by;
Synchronous FET
The power loss equation for Q2 is approximated
by;
*
2
+ ( Q g × V g × f )
? Q ?
? 2 ?
× V in × f ?
P loss = ( I rms 2 × R ds(on) )
? Q gd
+ ? I × × V in ×
? i g
? ?
f ? + ? I ×
? ?
Q gs 2
i g
?
?
*dissipated primarily in Q1.
For the synchronous MOSFET Q2, R ds(on) is an im-
portant characteristic; however, once again the im-
portance of gate charge must not be overlooked since
it impacts three critical areas. Under light load the
+ ( Q g × V g × f )
MOSFET must still be turned on and off by the con-
trol IC so the gate drive losses become much more
× V in × f ?
+
? Q oss
? 2
?
significant. Secondly, the output charge Q oss and re-
verse recovery charge Q rr both generate losses that
are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
This simplified loss equation includes the terms Q gs2
and Q oss which are new to Power MOSFET data sheets.
Q gs2 is a sub element of traditional gate-source
charge that is included in all MOSFET data sheets.
The importance of splitting this gate-source charge
into two sub elements, Q gs1 and Q gs2 , can be seen from
Fig 16.
Q gs2 indicates the charge that must be supplied by
the gate driver between the time that the threshold
voltage has been reached and the time the drain cur-
rent rises to I dmax at which time the drain voltage be-
gins to change. Minimizing Q gs2 is a critical factor in
reducing switching losses in Q1.
Q oss is the charge that must be supplied to the out-
put capacitance of the MOSFET during every switch-
ing cycle. Figure A shows how Q oss is formed by the
parallel combination of the voltage dependant (non-
linear) capacitance?s C ds and C dg when multiplied by
the power supply input buss voltage.
8
MOSFETs’ susceptibility to Cdv/dt turn on.
The drain of Q2 is connected to the switching node
of the converter and therefore sees transitions be-
tween ground and V in . As Q1 turns on and off there is
a rate of change of drain voltage dV/dt which is ca-
pacitively coupled to the gate of Q2 and can induce
a voltage spike on the gate that is sufficient to turn
the MOSFET on, resulting in shoot-through current .
The ratio of Q gd /Q gs1 must be minimized to reduce the
potential for Cdv/dt turn on.
Figure A: Q oss Characteristic
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