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参数资料
| 型号： | IRMD2214SS |
| 厂商： | International Rectifier |
| 文件页数： | 8/22页 |
| 文件大小： | 0K |
| 描述： | KIT DESIGN EVAL BOARD IR2214SS |
| 标准包装： | 1 |
| 系列： | HVIC |
| 主要目的： | 电源管理，半 H 桥驱动器（外部 FET） |
| 已用 IC / 零件： | IR2214SS |
| 已供物品： | 板，文档 |
| 相关产品： | IR22141SSTRPBF-ND - IC DVR HALF BRIDGE IC 24SSOP IR2214SSTRPBF-ND - IC DVR HALF BRIDGE IC 24SSOP IR2214SSPBF-ND - IC DRIVER HALF BRIDGE SGL 24SSOP IR22141SSPBF-ND - IC DRIVER HALF BRIDGE SGL 24SSOP IR2214SS-ND - IC DRIVER HALF BRIDGE SGL 24SSOP IR22141SS-ND - IC DRIVER HALF BRIDGE SGL 24SSOP |
| 其它名称： | *IRMD2214SS |
Datasheet rev 2.1
IRMD22141SS
OPERATING DESCRIPTION
Power on sequence
Before beginning the normal operating mode, it is strongly recommended to follow the power ON
sequence. The purpose of this procedure is to set the internal device logic. This is achieved by charging
all bootstrap capacitors for the first time with the FLT_CLR signal active. See Figure 4 for the correct
procedure.
V CC
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
FLT_CLR
power-on
charging Cboot
0
10
20
30
40
50
60
70
80
90
100
time
(usec)
Figure 4: Power on sequence
Normal operating mode
In the normal operating mode when HIN or LIN is active the high or low side IGBT turns on respectively.
Turn on and turn off propagation delays and the propagation delay matching are specified in the
IR22141SS datasheet. Devices introduce also a minimum dead-time (typical 330 ns).
Fault management
The IR22141SS is able to detect the excessive current increase by monitoring the IGBT desaturation.
The three-phase connection of the IR22141SS allows managing all power module faults using the
FAULT/SD and SYNC_FLT signals in a local network.
Figure 5 shows how the devices are interconnected to each other and with the FAULT/SD pin on the
connector. The fault management procedure starts when one of the drivers senses the IGBT
desaturation (see Figure 5 where, as an example, only one low side IGBT is shown).
Figure 6 shows an example where the low side IGBT of U1 and U3 and the high side of U2 are on.
The procedure is totally managed by an integrated FAULT LOGIC block without the controller
assistance.
Sep 9 , 2004
www.irf.com
page 8/22
th
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