参数资料
型号: IRS21271SPBF
厂商: International Rectifier
文件页数: 2/21页
文件大小: 0K
描述: IC DVR CURR SENSE 1CH 600V 8SOIC
标准包装: 95
配置: 高端
输入类型: 非反相
延迟时间: 150ns
电流 - 峰: 290mA
配置数: 1
输出数: 1
高端电压 - 最大(自引导启动): 600V
电源电压: 9 V ~ 20 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
IRS212(7, 71, 8, 81)(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
V B
V S
V HO
V CC
V IN
V FLT
V CS
dV s /dt
Definition
High-side floating supply voltage
High-side floating offset voltage
High-side floating output voltage
Logic supply voltage
Logic input voltage
FAULT output voltage
Current sense voltage
Allowable offset supply voltage transient
Min.
-0.3
V B - 25
V S - 0.3
-0.3
-0.3
-0.3
V S - 0.3
Max.
625
V B + 0.3
V B + 0.3
25
V CC + 0.3
V CC + 0.3
V B + 0.3
50
Units
V
V/ns
P D
Rth JA
T J
T S
T L
Package power dissipation @ T A ≤ +25 °C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
8-Lead DIP
8-Lead SOIC
8-Lead DIP
8-Lead SOIC
-55
1.0
0.625
125
200
150
150
300
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V S offset rating is tested with all supplies biased at 15 V differential.
Symbol
Definition
Min.
Max.
Units
V B
V S
V HO
High-side floating supply voltage
High-side floating offset voltage
High-side floating output voltage
(IRS2127/IRS2128)
(IRS21271/IRS21281)
V S + 12
V S + 9
Note 1
V S
V S + 20
V S + 20
600
V B
V CC
V IN
V FLT
V CS
T A
Logic supply voltage
Logic input voltage
FAULT output voltage
Current sense signal voltage
Ambient temperature
10
0
0
V S
-40
20
V CC
V CC
V S + 5
125
V
°C
Note 1: Logic operational for V S of -5 V to +600 V. Logic state held for V S of -5 V to -V BS . (Please refer to the Design Tip
DT97-3 for more details).
www.irf.com
2
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