参数资料
型号: IRS25411SPBF
厂商: International Rectifier
文件页数: 12/20页
文件大小: 0K
描述: IC LED CONS CURR CTRL 8SOIC
标准包装: 95
拓扑: PWM,降压(降压)
输出数: 1
内部驱动器:
类型 - 主要: 通用
频率: 500kHz
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
IRS254(0,1)(S)PbF
Application Information and Additional
Details
Operating Mode
determined as follows. When the inductance value
is large enough to maintain a low ripple on I FB , I out,avg
can be calculated:
The IRS254(01,11) operates as a time-delayed
hysteritic buck controller. During normal operating
conditions the output current is regulated via the IFB
pin voltage (nominal value of 500 mV). This feedback
is compared to an internal high precision bandgap
voltage reference. An on-board dV/dt filter has also
been used to ignore erroneous transitioning.
Once the supply to the IC reaches V CCUV+ , the LO
output is held high and the HO output low for a
Iout ( avg ) = VIFBTH
RCS
predetermined period of time. This initiates charging of
the bootstrap capacitor, establishing the V BS floating
supply for the high-side output. The IC then begins
toggling HO and LO outputs as needed to regulate the
current.
(A)
F ig.2 (A) Storing Energy in Inductor
(B) Releasing Inductor Stored Energy
(B)
Iout
HO
50%
t_HO_off
50%
DT1
50%
t_HO_on
DT2
HO
LO
LO
IFB
IFBTH
t_LO_on
50%
t_LO_off
50%
Fig.1 IRS254(01,11) Control Signals, Iavg=1.2 A
As long as V IFB is below V IFBTH , HO is on, modulated by
the watchdog timer described below, which maintains
charge for the floating high side on the bootstrap
capacitor. The load is receiving current from V BUS ,
which simultaneously stores energy in the inductor, as
V IFB increases, unless the load is open circuit. Once
V IFB crosses V IFBTH , the control loop switches HO off
after the delay t HO,OFF . When HO switches off, LO will
turn on after the deadtime (DT), the inductor then
releases its stored energy into the load and V IFB starts
decreasing. When V IFB drops below V IFBTH again, the
control loop switches HO on after the delay t HO,ON and
LO off after the delay t HO,ON + DT. The switching
continues to regulate the current at an average value
www.irf.com
12
Fig.3 IRS254(0,1) Time Delayed Hysterisis
The control method is hysteretic with a free running
frequency, which enables average current regulation
in constrast to a fixed frequency scheme providing
peak current regulation only. This reduces the part
count since there is no need for frequency setting
components and also provides an inherently stable
system, which acts as a dynamic current source.
A deadtime of approximately 140 ns between the two
gate drive signals is incoporated to prevent shoot-
through. The deadtime has been adjusted to maintain
precise current regulation, while still preventing
shoot-through.
? 2010 International Rectifier
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