参数资料
型号: IS41C4100-35T
英文描述: 1Mx4 bit Dynamic RAM with EDO Page Mode
中文描述: 1Mx4位动态RAM与江户页面模式
文件页数: 9/21页
文件大小: 250K
代理商: IS41C4100-35T
IC41C4100
IC41LV4100
Integrated Circuit Solution Inc.
DR027-0A 09/05/2001
9
AC CHARACTERISTICS
(Continued)
(1,2,3,4,5,6)
(Recommended Operating Conditions unless otherwise noted.)
35
-50
-60
Symbol
Parameter
Min. Max.
Min. Max.
Min. Max.
Units
t
ACH
Column-Address Setup Time to
CAS
Precharge during WRITE Cycle
OE
Hold Time from
WE
during
READ-MODIFY-WRITE cycle
(18)
Data-In Setup Time
(15, 22)
Data-In Hold Time
(15, 22)
READ-MODIFY-WRITE Cycle Time
RAS
to
WE
Delay Time during
READ-MODIFY-WRITE Cycle
(14)
CAS
to
WE
Delay Time
(14, 20)
Column-Address to
WE
Delay Time
(14)
EDO Page Mode READ or WRITE
Cycle Time
(24)
RAS
Pulse Width in EDO Page Mode
Access Time from
CAS
Precharge
(15)
EDO Page Mode READ-WRITE
Cycle Time
(24)
Data Output Hold after
CAS
LOW
Output Buffer Turn-Off Delay from
CAS
or
RAS
(13,15,19, 29)
Output Disable Delay from
WE
Last
CAS
going LOW to First
CAS
returning HIGH
(23)
CAS
Setup Time (CBR REFRESH)
(30, 20)
CAS
Hold Time (CBR REFRESH)
(30, 21)
OE
Setup Time prior to
RAS
during
HIDDEN REFRESH Cycle
Refresh Period (512 Cycles)
Transition Time (Rise or Fall)
(2, 3)
15
15
15
ns
t
OEH
8
10
15
ns
t
DS
t
DH
t
RWC
t
RWD
0
6
80
45
0
8
0
10
140
80
ns
ns
ns
ns
125
70
t
CWD
t
AWD
t
PC
25
30
12
34
42
20
36
49
25
ns
ns
ns
t
RASP
t
CPA
t
PRWC
35
40
100K
21
50
47
100K
27
50
56
100K
34
ns
ns
ns
t
COH
t
OFF
5
3
15
5
3
15
5
3
15
ns
ns
t
WHZ
t
CLCH
3
10
15
3
10
15
3
10
15
ns
ns
t
CSR
t
CHR
t
ORD
8
8
0
10
10
0
10
10
0
ns
ns
ns
t
REF
t
T
1
8
50
8
1
50
8
1
50
ms
ns
AC TEST CONDITIONS
Output load:
Two TTL Loads and 50 pF (Vcc = 5.0V ±10%)
One TTL Load and 50 pF (Vcc = 3.3V ±10%)
Input timing reference levels: V
IH
= 2.4V, V
IL
= 0.8V (Vcc = 5.0V ±10%);
V
IH
= 2.0V, V
IL
= 0.8V (Vcc = 3.3V ±10%)
Output timing reference levels: V
OH
= 2.0V, V
OL
= 0.8V (Vcc = 5V ±10%, 3.3V ±10%)
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