参数资料
型号: IS61SP25618-133TQ
厂商: INTEGRATED SILICON SOLUTION INC
元件分类: SRAM
英文描述: Octal Transparent D-Type Latches With 3-State Outputs 20-SSOP -40 to 85
中文描述: 256K X 18 CACHE SRAM, 4 ns, PQFP100
封装: TQFP-100
文件页数: 14/15页
文件大小: 120K
代理商: IS61SP25618-133TQ
IS61SP25616
IS61SP25618
ISSI
8
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
04/17/01
CAPACITANCE(1,2)
Symbol
Parameter
Conditions
Max.
Unit
CIN
Input Capacitance
VIN = 0V
6
pF
COUT
Input/Output Capacitance
VOUT = 0V
8
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.3V.
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
0V to 3.0V
Input Rise and Fall Times
1.5 ns
Input and Output Timing
1.5V
and Reference Level
Output Load
See Figures 1 and 2
AC TEST LOADS
Output
Buffer
ZO = 50
1.5V
50
30 pF
317
5 pF
Including
jig and
scope
351
OUTPUT
3.3V
Figure 1
Figure 2
相关PDF资料
PDF描述
IS61SP25618-133TQI Octal Transparent D-Type Latches With 3-State Outputs 20-SSOP -40 to 85
IS61SP25618-150B Octal Transparent D-Type Latches With 3-State Outputs 20-SSOP -40 to 85
IS61SP25618-150TQ Octal Transparent D-Type Latches With 3-State Outputs 20-SOIC -40 to 85
IS61SP25618-150TQI Octal Transparent D-Type Latches With 3-State Outputs 20-SOIC -40 to 85
IS61SP25618-166B Octal Transparent D-Type Latches With 3-State Outputs 20-SOIC -40 to 85
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