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参数资料
| 型号： | IS80C52-24PL |
| 厂商： | INTEGRATED SILICON SOLUTION INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 4/48页 |
| 文件大小： | 379K |
| 代理商： | IS80C52-24PL |
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IS80C52
IS80C32
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
MC004-1D
11/19/98
ISSI
IP:
Interrupt Priority Register. Bit Addressable.
7
6
54321
0
—
PT2
PS
PT1
PX1
PT0 PX0
Register Description:
—
IP.7
Not implemented, reserve for future use(3)
—
IP.6
Not implemented, reserve for future use(3)
PT2
IP.5
Defines Timer 2 interrupt priority level
PS
IP.4
Defines Serial Port interrupt priority level
PT1
IP.3
Defines Timer 1 interrupt priority level
PX1
IP.2
Defines External Interrupt 1 priority level
PT0
IP.1
Defines Timer 0 interrupt priority level
PX0
IP.0
Defines External Interrupt 0 priority level
Notes:
1. In order to assign higher priority to an interrupt the
coresponding bit in the IP register must be set to 1. While an
interrupt service is in progress, it cannot be interrupted by a
lower or same level interrupt.
2. Priority within level is only to resolve simultaneous requests
of the same priority level. From high to low, interrupt sources
are listed below:
IE0
TF0
IE1
TF1
RI or TI
TF2 or EXF2
3. User software should not write 1s to reserved bits. These bits
may be used in future products to invoke new features.
TCON:
Timer/Counter Control Register. Bit Addressable
7
6
54321
0
TF1 TR1
TF0
TR0
IE1
IT1
IE0
IT0
Register Description:
TF1
TCON.7
Timer 1 overflow flag. Set by hardware
when the Timer/Counter 1 overflows.
Cleared by hardware as processor
vectors to the interrupt service routine.
TR1
TCON.6
Timer 1 run control bit. Set/Cleared by
software to turn Timer/Counter 1 ON/
OFF.
TF0
TCON.5
Timer 0 overflow flag. Set by hardware
when the Timer/Counter 0 overflows.
Cleared by hardware as processor
vectors to the interrupt service routine.
TR0
TCON.4
Timer 0 run control bit. Set/Cleared by
software to turn Timer/Counter 0 ON/
OFF.
IE1
TCON.3
External Interrupt 1 edge flag. Set by
hardware when the External Interrupt
edge is detected. Cleared by hardware
when interrupt is processed.
IT1
TCON.2
Interrupt 1 type control bit. Set/Cleared
by software specify falling edge/low
level triggered External Interrupt.
IE0
TCON.1
External Interrupt 0 edge flag. Set by
hardware when the External Interrupt
edge is detected. Cleared by hardware
when interrupt is processed.
IT0
TCON.0
Interrupt 0 type control bit. Set/Cleared
by software specify falling edge/low
level triggered External Interrupt.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IS80C52-24PLI | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER |
| IS80C52-24PQ | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER |
| IS80C52-24PQI | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER |
| IS80C52-24W | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
| IS80C52-24WI | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER |
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