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参数资料
| 型号： | IS82C37A |
| 厂商： | HARRIS SEMICONDUCTOR |
| 元件分类： | DMA控制器 |
| 英文描述： | RES CHP 2.2K 1/8W 5% |
| 中文描述： | 4 CHANNEL(S), 8 MHz, DMA CONTROLLER, PQCC44 |
| 文件页数： | 12/23页 |
| 文件大小： | 204K |
| 代理商： | IS82C37A |
4-203
82C37A
Application Information
Figure 6 shows an application for a DMA system utilizing the
82C37A DMA controller and the 80C88 Microprocessor. In
this application, the 82C37A DMA controller is used to
improve system performance by allowing an I/O device to
transfer data directly to or from system memory.
Components
The system clock is generated by the 82C84A clock driver
and is inverted to meet the clock high and low times required
by the 82C37A DMA controller. The four OR gates are used
to support the 80C88 Microprocessor in minimum mode by
producing the control signals used by the processor to
access memory or I/O. A decoder is used to generate chip
select for the DMA controller and memory. The most signifi-
cant bits of the address are output on the address/data bus.
Therefore, the 82C82 octal latch is used to demultiplex the
address. Hold Acknowledge (HLDA) and Address Enable
(AEN) are “ORed” together to insure that the DMA controller
does not have bus contention with the microprocessor.
Operation
A DMA request (DREQ) is generated by the I/O device. After
receiving the DMA request, the DMA controller will issue a
Hold request (HRQ) to the processor. The system busses
are not released to the DMA controller until a Hold Acknowl-
edge signal is returned to the DMA controller from the
80C88 processor. After the Hold Acknowledge has been
received, addresses and control signals are generated by
the DMA controller to accomplish the DMA transfers. Data is
transferred directly from the I/O device to memory (or vice
versa) with IOR and MEMW (or MEMR and IOW) being
active. Note that data is not read into or driven out of the
DMA controller in I/O-to-memory or memory-to-I/O data
transfers.
FIGURE 6. APPLICATION FOR DMA SYSTEM
MEMR
MEMW
IOR
IOW
MEMCS
MEMR
MEMW
MEMORY
47k
V
CC
ADDRESS BUS
DATA BUS
V
CC
DATA BUS
80C88
WR
RD
M/IO
HRQ
HLDA
AX
ALE
AD0
AD7
MN/MX
CLK
82C84A
OR
82C85
HLDA
MEMCS
STB
82C82
OE
DECODER
ADDRESS BUS
STB
82C82
OE
A0-7
DB0-7
CS
ADSTB
CLK
EOP
HLDA
IOR
IOW
MEMR
MEMW
HRQ
DREQ0
DACK
AEN
82C37A
IOR
IOW
V
CC
CS
DREQ
I/O
DEVICE
NOTE:
The address lines need pull-up resistors.
相关PDF资料 |
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| IS82C37A-5 | CMOS High Performance Programmable DMA Controller |
| IS82C55A | 30 AMP MINIATURE POWER RELAY |
| IS82C55A-5 | CMOS Programmable Peripheral Interface |
| IS82C55A | CMOS Programmable Peripheral Interface |
| IS82C55A-5 | CMOS Programmable Peripheral Interface |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IS82C37A-12 | 制造商:HARRIS 制造商全称:HARRIS 功能描述:CMOS High Performance Programmable DMA Controller |
| IS82C37A-5 | 功能描述:外围驱动器与原件 - PCI DMA CONTROLLER IC -4 0+85C 5.0V 5.0MHZ DM RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| IS82C50A | 制造商:未知厂家 制造商全称:未知厂家 功能描述:UART |
| IS82C50A-5 | 功能描述:UART 接口集成电路 PERIPH UART/BRG 5V 10MHZ 44PLCC IND RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| IS82C50A-5Z | 功能描述:UART 接口集成电路 W/ANNEAL PERIPH UART /BRG 5V 10MHZ RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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