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参数资料
| 型号： | ISB35484 |
| 厂商： | 意法半导体 |
| 英文描述： | HCMOS STRUCTURED ARRAY |
| 中文描述： | HCMOS结构化阵列 |
| 文件页数： | 6/15页 |
| 文件大小： | 345K |
| 代理商： | ISB35484 |
MPUL
LPUL
Trip Level = 0.5* Vdd
0.2* Vdd
Vss - 0.3 Volts
Vdd + 0.3 Volts
0.8 * Vdd
Typical Current from all Vdd
supplies at LPUL or MPDL
25
μ
A per receiver
MPDL
LPDL
MPUL
LPUL
Trip Level = 1.4 Volts
(nominal)
Vss + 0.8 Volts
Vss - 0.3 Volts
Vdd + 0.3 Volts
Vss + 2.0 Volts
Typical Current from all Vdd
supplies at LPUL or MPDL
25
μ
A per receiver
MPDL
LPDL
Figure 4a. D.C. Specifications for LVCMOS Input Receivers
Figure 4b. D.C. Specifications for LVTTL Input Receivers
Current Drive
(mA)
Maximum
Capacitance (pF)
2.0
4.0
8.0
12.0
16.0
24.0
50
100
200
300
400
800
Table 2. I/O Drive Capacity for LVCMOS and
LVTTL Slew Rate Buffers
Current Drive
(mA)
Maximum
Capacitance (pF)
2.0
4.0
8.0
12.0
16.0
24.0
50
100
200
300
400
800
Table 3. I/O Drive Capacity for LVCMOS and
LVTTL Non Slew Rate Buffers
ISB35000 SERIES
6/15
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