参数资料
| 型号： | ISL12024IRTCZ-T |
| 厂商： | Intersil |
| 文件页数： | 19/24页 |
| 文件大小： | 0K |
| 描述： | IC RTC/CALENDER 64BIT 8-TDFN |
| 标准包装： | 6,000 |
| 类型： | 时钟/日历 |
| 特点： | 警报器，闰年，唯一 ID |
| 时间格式： | HH:MM:SS（12/24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电压 - 电源，电池： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TDFN |
| 供应商设备封装： | 8-TDFN（3x3） |
| 包装： | 带卷 (TR) |
4
FN6749.1
December 15, 2011
EEPROM Specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
EEPROM Endurance
2,000,000
Cycles
EEPROM Retention
Temperature
≤ +75°C
50
Years
Serial Interface (I2C) Specifications
DC Electrical Specifications
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 12)
TYP
MAX
(Note 12)
UNITS
NOTES
VIL
SDA, and SCL Input Buffer LOW
Voltage
-0.3
0.3 x VDD
V
VIH
SDA, and SCL Input Buffer HIGH
Voltage
0.7 x VDD
VDD + 0.3
V
Hysteresis
SDA and SCL Input Buffer Hysteresis
0.05 x VDD
VOL
SDA Output Buffer LOW Voltage
IOL = 4mA
0
0.4
V
ILI
Input Leakage Current on SCL
VIN = 5.5V
100
nA
ILO
I/O Leakage Current on SDA
VIN = 5.5V
100
nA
AC Electrical Specifications
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 12)
TYP
MAX
(Note 12) UNITS NOTES
fSCL
SCL Frequency
400
kHz
tIN
Pulse width Suppression Time at
SDA and SCL Inputs
Any pulse narrower than the max spec is
suppressed.
50
ns
tAA
SCL Falling Edge to SDA Output
Data Valid
SCL falling edge crossing 30% of VDD, until
SDA exits the 30% to 70% of VDD window.
900
ns
tBUF
Time the Bus Must be Free Before
the Start of a New Transmission
SDA crossing 70% of VDD during a STOP
condition, to SDA crossing 70% of VDD during
the following START condition.
1300
ns
tLOW
Clock LOW Time
Measured at the 30% of VDD crossing.
1300
ns
tHIGH
Clock HIGH Time
Measured at the 70% of VDD crossing.
600
ns
tSU:STA
START Condition Set-up Time
SCL rising edge to SDA falling edge. Both
crossing 70% of VDD.
600
ns
tHD:STA
START Condition Hold Time
From SDA falling edge crossing 30% of VDD to
SCL falling edge crossing 70% of VDD.
600
ns
tSU:DAT
Input Data Set-up Time
From SDA exiting the 30% to 70% of VDD
window, to SCL rising edge crossing 30% of
VDD.
100
ns
tHD:DAT
Input Data Hold Time
From SCL rising edge crossing 70% of VDD to
SDA entering the 30% to 70% of VDD window.
0ns
tSU:STO
STOP Condition Set-up Time
From SCL rising edge crossing 70% of VDD, to
SDA rising edge crossing 30% of VDD.
600
ns
tHD:STO
STOP Condition Hold Time for
Read, or Volatile Only Write
From SDA rising edge to SCL falling edge. Both
crossing 70% of VDD.
600
ns
tDH
Output Data Hold Time
From SCL falling edge crossing 30% of VDD,
until SDA enters the 30% to 70% of VDD
window.
0ns
ISL12024IRTC
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| ISL12024IVZ | 功能描述:实时时钟 REAL TIME CLK/CLNDR W/EEPROM IN 8LD RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| ISL12024IVZ-T | 功能描述:实时时钟 REAL TIME CLK/CLNDR W/EEPROM IN 8LD RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
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| ISL12025IBZ | 功能描述:实时时钟 REAL TIME CLK/CLNDR W/EEPROM 2 63VSET RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| ISL12025IBZ-T | 功能描述:实时时钟 REAL TIME CLK/CLNDR W/EEPROM 2 63VSET RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
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