参数资料
| 型号： | ISL1221IUZ-T |
| 厂商： | Intersil |
| 文件页数： | 8/24页 |
| 文件大小： | 0K |
| 描述： | IC RTC LP BATT BACK SRAM 10MSOP |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 1 |
| 类型： | 时间事件记录器 |
| 特点： | 警报器，闰年，SRAM |
| 存储容量： | 2B |
| 时间格式： | HH:MM:SS（12/24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电压 - 电源，电池： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 标准包装 |
| 产品目录页面： | 1245 (CN2011-ZH PDF) |
| 其它名称： | ISL1221IUZ-TDKR |
16
FN6316.1
July 15, 2010
BATTERY MODE ATR SELECTION (BMATR <1:0>)
Since the accuracy of the crystal oscillator is dependent on
the VDD/VBAT operation, the ISL1221 provides the capability
to adjust the capacitance between VDD and VBAT when the
device switches between power sources.
DIGITAL TRIMMING REGISTER (DTR <2:0>)
The digital trimming bits DTR0, DTR1, and DTR2 adjust the
average number of counts per second and average the ppm
error to achieve better accuracy.
DTR2 is a sign bit. DTR2 = “0” means frequency
compensation is >0. DTR2 = “1” means frequency
compensation is <0.
DTR1 and DTR0 are both scale bits. DTR1 gives 40ppm
adjustment and DTR0 gives 20ppm adjustment.
A range from -60ppm to +60ppm can be represented by
using these three bits (Table 13).
Alarm Registers
Addresses [0Ch to 11h]
The alarm register bytes are set up identical to the RTC
register bytes, except that the MSB of each byte functions as
an enable bit (enable = “1”). These enable bits specify which
alarm registers (seconds, minutes, etc.) are used to make
the comparison. Note that there is no alarm byte for year.
The alarm function works as a comparison between the
alarm registers and the RTC registers. As the RTC
advances, the alarm will be triggered once a match occurs
between the alarm registers and the RTC registers. Any one
alarm register, multiple registers, or all registers can be
enabled for a match.
There are two alarm operation modes: Single Event and
periodic Interrupt Mode:
Single Event Mode is enabled by setting the ALME bit to
“1”, the IM bit to “0”, and disabling the frequency output.
This mode permits a one-time match between the alarm
registers and the RTC registers. Once this match occurs,
the ALM bit is set to “1” and the IRQ output will be pulled
low and will remain low until the ALM bit is reset. This can
be done manually or by using the auto-reset feature.
Interrupt Mode is enabled by setting the ALME bit to “1”,
the IM bit to “1”, and disabling the frequency output. The
IRQ output will now be pulsed each time an alarm occurs.
This means that once the interrupt mode alarm is set, it
will continue to alarm for each occurring match of the
alarm and present time. This mode is convenient for
hourly or daily hardware interrupts in microcontroller
applications such as security cameras or utility meter
reading.
To clear an alarm, the ALM bit in the status register must be
set to “0” with a write. Note that if the ARST bit is set to 1
(address 07h, bit 7), the ALM bit will automatically be cleared
when the status register is read.
Following are examples of both Single Event and periodic
Interrupt Mode alarms.
Example 1 – Alarm set with single interrupt (IM = “0”)
A single alarm will occur on January 1 at 11:30am.
A. Set Alarm registers as follows:
B. Also the ALME bit must be set as follows:
TABLE 12.
BMATR1
BMATR0
DELTA
CAPACITANCE
(CBAT TO CVDD)
0
0pF
0
1
-0.5pF (
≈ +2ppm)
1
0
+0.5pF (
≈ -2ppm)
1
+1pF (
≈ -4ppm)
TABLE 13. DIGITAL TRIMMING REGISTERS
DTR REGISTER
ESTIMATED
FREQUENCY
PPM
DTR2
DTR1
DTR0
0
0 (default)
00
1
+20
01
0
+40
01
1
+60
10
0
10
1
-20
11
0
-40
11
1
-60
ALARM
REGISTER
BIT
DESCRIPTION
7 6543210 HEX
SCA
0 0000000
00h Seconds disabled
MNA
1 0110000
B0h Minutes set to 30,
enabled
HRA
1 0010001
91h Hours set to 11,
enabled
DTA
1 0000001
81h Date set to 1,
enabled
MOA
1 0000001
81h Month set to 1,
enabled
DWA
0 0000000
00h Day of week
disabled
CONTROL
REGISTER
BIT
DESCRIPTION
765 43210 HEX
INT
0 1 x x 0000
x0hEnable Alarm
ISL1221
相关PDF资料 |
PDF描述 |
|---|---|
| VE-J1D-MZ | CONVERTER MOD DC/DC 85V 25W |
| VI-JNZ-EY-F4 | CONVERTER MOD DC/DC 2V 20W |
| VE-J1B-MZ | CONVERTER MOD DC/DC 95V 25W |
| VE-J14-MZ | CONVERTER MOD DC/DC 48V 25W |
| VI-JNZ-EY-F3 | CONVERTER MOD DC/DC 2V 20W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL14010 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Low Jitter Clock Generators for Set-Top Box |
| ISL14010IRZ | 功能描述:时钟合成器/抖动清除器 REAL TIME CLKRTC 16LD 3X3 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| ISL14010IRZ-T | 功能描述:实时时钟 REAL TIME CLKRTC 16LD 3X3 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| ISL14011 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Low Jitter Clock Generators for Set-Top Box |
| ISL14011IRZ | 功能描述:时钟合成器/抖动清除器 REAL TIME CLKRTC 16LD 3X3 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。