参数资料
型号: ISL28288FBZ-T7
厂商: Intersil
文件页数: 3/20页
文件大小: 0K
描述: IC OP AMP DUAL RRIO 8-SOIC
标准包装: 1,000
放大器类型: 通用
电路数: 2
输出类型: 满摆幅
转换速率: 0.14 V/µs
增益带宽积: 300kHz
电流 - 输入偏压: 10pA
电压 - 输入偏移: 50µV
电流 - 电源: 120µA
电流 - 输出 / 通道: 31mA
电压 - 电源,单路/双路(±): 2.4 V ~ 5.5 V,±1.2 V ~ 2.75 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
ISL28288, ISL28488
11
FN6339.4
July 26, 2011
Applications Information
Introduction
The ISL28288 and ISL28488 are dual and quad CMOS rail-to-rail
input, output (RRIO) micropower operational amplifiers. These
devices are designed to operate from a single supply (2.4V to
5.5V) or dual supplies (±1.2V to ±2.75V) while drawing only 60A
of supply current per amplifier. This combination of low power
and precision performance makes these devices suitable for
solar and battery power applications.
Rail-to-Rail Input
Many rail-to-rail input stages use two differential input pairs, a
long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties
have to be paid for this circuit topology. As the input signal moves
from one supply rail to another, the operational amplifier
switches from one input pair to the other causing drastic changes
in input offset voltage and an undesired change in magnitude
and polarity of input offset current.
These amplifiers achieve rail-to-rail input operation without
sacrificing important precision specifications and degrading
distortion performance. The devices’ input offset voltage exhibits
a smooth behavior throughout the entire common-mode input
range. The input bias current vs the common-mode voltage range
gives us an undistorted behavior from typically 100mV below the
negative rail and 10% higher than the V+ rail (0.5V higher than V+
when V+ equals 5.5V).
Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. There is an additional
pair of back-to-back diodes across the input terminals. For
applications where the input differential voltage is expected to
Pin Descriptions
ISL28288
(8 LD SOIC)
ISL28288
(10 LD MSOP)
ISL28488
(14 LD TSSOP)
ISL28488
(16 LD QSOP)
PIN NAME
EQUIVALENT
CIRCUIT
DESCRIPTION
3
1
3
IN+_A
Circuit 1
Amplifier A non-inverting input
-2
-
EN_A
Circuit 2
Amplifier A enable pin internal pull-down; Logic “1”
selects the disabled state; Logic “0” selects the
enabled state.
4
3
11
13
V-
Circuit 4
Negative power supply
-4
-
EN_B
Circuit 2
Amplifier B enable pin with internal pull-down; Logic
“1” selects the disabled state; Logic “0” selects the
enabled state.
5
IN+_B
Circuit 1
Amplifier B non-inverting input
6
IN-_B
Circuit 1
Amplifier B inverting input
7
OUT_B
Circuit 3
Amplifier B output
88
4
V+
Circuit 4
Positive power supply
1
9
1
OUT_A
Circuit 3
Amplifier A output
2
10
2
IN-_A
Circuit 1
Amplifier A inverting input
-
8
10
OUT_C
Circuit 3
Amplifier C output
-
9
11
IN-_C
Circuit 1
Amplifier C inverting input
-
10
12
IN+_C
Circuit 1
Amplifier C non-inverting input
-
12
14
IN+_D
Circuit 1
Amplifier D non-inverting input
-
13
15
IN-_D
Circuit 1
Amplifier D inverting input
-
14
16
OUT_D
Circuit 3
Amplifier D output
--
-
8, 9
NC
-
No internal connection
EN
V+
V-
V+
V-
OUT
CIRCUIT 3
CIRCUIT 1
CIRCUIT 2
V+
V-
CIRCUIT 4
IN-
V+
V-
IN+
CAPACITIVELY
COUPLED
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