参数资料
型号: ISL29023IROZ-EVALZ
厂商: Intersil
文件页数: 9/14页
文件大小: 0K
描述: EVALUATION BOARD ISL29023IROZ
标准包装: 1
传感器类型: 灯光,数字式输出
传感范围: 64000Lux
接口: I²C,SM 总线
灵敏度: 540nm
电源电压: 2.25 V ~ 3.63 V
嵌入式:
已供物品:
已用 IC / 零件: ISL29023
ISL29023
OPERATION MODE BITS (B5 - B7)
.
TABLE 9. ADC RESOLUTION DATA WIDTH
ISL29023 has different operating modes. These modes are
selected by setting B5 -B7 bits on register address 0x00. The
device powers up on a disable mode. Table 6 lists the possible
operating modes.
TABLE 6. OPERATING MODES BITS
B3
0
0
1
B2
0
1
0
NUMBER OF CLOCK CYCLES
2 16 = 65,536
2 12 = 4,096
2 8 = 256
n-BIT ADC
16
12
8
B7
B6
B5
OPERATION
1
1
2 4
= 16
4
0
0
0
0
0
1
Power-down the device (Default)
The IC measures ALS only once every
Data Registers (Addresses: 0x02 & 0x03)
integration cycle. This is the lowest
TABLE 10. ADC REGISTER BITS
operating mode.
Reg.
Register Bits
0
1
0
IR once
Addr
DFLT
0
1
1
Reserved (DO NOT USE)
NAME
(Hex)
B7
B6
B5
B4
B3
B2
B1
B0
(Hex)
1
0
0
Reserved (DO NOT USE)
DATA LSB 0x02
D7
D6
D5
D4
D3
D2
D1
D0
0x00
1
0
1
The IC measures ALS continuously
DATA MSB 0x03 D15 D14 D13 D12 D11 D10
D9
D8
0x00
1
1
0
The IC measures IR continuous
1
1
1
Reserved (DO NOT USE)
The ISL29023 has two 8-bit read-only registers to hold the upper
and lower byte of the ADC value. The upper byte is accessed at
Command-II Register (Address: 0x01 )
TABLE 7. COMMAND-II REGISTER BITS
address 0x03 and the lower byte is accessed at address 0x02.
For 16-bit resolution, the data is from D0 to D15; for 12-bit
resolution, the data is from D0 to D11; for 8-bit resolution, the
data is from D0 to D7 and 4-bit resolution, the data is from D0 to
Reg.
Register Bits
D3. The registers are refreshed after every conversion cycle. The
NAME
Addr
(Hex) B7 B6 B5 B4
B3
B2
B1
B0
DFLT
(Hex)
default register value is 0x00 at power on.
COMMANDII 0x01 0
0
0
0 RES1 RES0 RANGE1 RANGE0 0x00
TABLE 11. ADC DATA REGISTERS
ADDRESS
The Command-II register consists of ADC control bits. In this
register, there are two range bits, and two ADAC resolution bits.
The default register value is 0x00 at power on.
FULL SCALE RANGE (B0 - B1)
(hex)
0x02
0x03
CONTENTS
D0 is LSB for 4, 8, 12 or 16-bit resolution; D3 is MSB for
4-bit resolution; D7 is MSB for 8-bit resolution
D15 is MSB for 16-bit resolution; D11 is MSB for 12-bit
resolution
The Full Scale Range (FSR) has four different selectable ranges.
The range determines the ADC resolution (4-bits, 8-bits, 12-bits,
and 16-bits). Each range has a maximum allowable lux value.
Higher range values offer better resolution and wider ALS lux
value. Table 8 lists the possible values of FSR for the 499k ? R EXT
resistor.
Lower Interrupt Threshold Registers
(Address: 0x04 & 0x05)
TABLE 12. INTERRUPT REGISTER BITS
Reg. Register Bits
TABLE 8. RANGE REGISTER BITS
NAME
Addr
(Hex)
B7
B6
B5
B4
B3
B2
DFLT
B1 B0 (Hex)
B0
B1
k
RANGE(k)
FSR (LUX) @ ALS
SENSING
FSR @ IR
SENSING
INT_LT_LSB 0x04 TL7
TL6
TL5
TL4
TL3
TL2 TL1 TL0 0x00
0
0
1
1
0
1
0
1
1
2
3
4
Range1
Range2
Range3
Range4
1,000
4,000
16,000
64,000
INT_LT_MSB 0x05 TL15 TL14 TL13 TL12 TL11 TL10 TL9 TL8 0x00
The lower interrupt threshold registers are used to set the lower
trigger point for interrupt generation. If the ALS value crosses
below or is equal to the lower threshold, an interrupt is asserted
ADC RESOLUTION (B3 - B2)
B2 and B3 determine the ADC’s resolution and the number of
clock cycles per conversion. Changing the number of clock cycles
does more than just change the resolution of the device; it also
changes the integration time, which is the period the device’s
analog-to-digital (A/D) converter samples the photodiode current
signal for a measurement. Table 9 lists the possible ADC
resolution.
9
on the interrupt pin and the interrupt flag. Registers INT_LT_LSB
(0x04) and INT_LT_MSB (0x05) provide the low and high bytes,
respectively, of the lower interrupt threshold. The high and low
bytes from each set of registers are combined to form a 16-bit
threshold value. The interrupt threshold registers default to 0x00
upon power up.
FN6691.3
April 25, 2013
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