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参数资料
| 型号： | ISL45042IRZ-TK |
| 厂商： | INTERSIL CORP |
| 元件分类： | 消费家电 |
| 英文描述： | LCD Module Calibrator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO8 |
| 封装： | 3 X 3 MM, LEAD FREE, PLASTIC, TDFN-8 |
| 文件页数： | 5/8页 |
| 文件大小： | 129K |
| 代理商： | ISL45042IRZ-TK |
5
FN6072.6
November 14, 2006
When the part is programmed, the counter setting is loaded
into the non-volatile memory. This value will be loaded from
the nonvolatile memory during initial power-up or when the
CE pin is pulled low.
Once the programming is completed it is recommended that
the user float the CLT pin. The CTL pin is internally tied to a
resistor network connected to ground. If left floating, the
voltage at the CTL pin will equal V
DD
/2. Under these
conditions, no additional pulses will be seen by the Up/Down
counter via the CTL pin. To prevent further programming
ground the CE pin.
CTL should have a noise filter to reduce bouncing or noise
on the input that could cause unwanted counting when the
CE pin is high. The board should have an additional ESD
protection circuit, with a series 1k
Ω
resistor and a shunt
0.01μF capacitor connected on the CTL pin. (See Figure 3)
To avoid unintentional adjustment, the ISL45042 guarantees
to reject CTL pulses shorter than 20μs.
During Initial Power-up (only), to avoid the possibility of a
false pulse (since the internal comparators come up in an
unknown state) the very first CTL pulse is ignored. See
Figure 6 for the timing information.
CE Pin
To adjust the output voltage, the CE pin must be pulled high
(VDD). The CE pin has an internal pull-down resistor to
prevent unwanted reprogramming of the EEPROM. The
impedance of this resistor is 400k
Ω
to 500k
Ω
(R
INTERNAL
Figure 5).
Transitions of the CE pin are recommended to be less than
10
μ
seconds.
Replacing Existing Mechanical Potentiometer
Circuits
Figure 4 shows the common adjustment mechanical circuits
and equivalent replacement with the ISL45042.
Expected Output Voltage
The ISL45042 provides an output sink current which lowers
the voltage on the external voltage divider (VCOM output
voltage). EQ. 1 and EQ. 2 can be used to calculate the
output current (IOUT) and output voltage (VOUT) values.
)
NOTE: Where setting is an integer between 1 and 128.
CTL VOLTAGE
TIME
4.9V
CTL
PT
FIGURE 2. EEPROM PROGRAMMING
>200μs
FIGURE 3. EXTERNAL ESD PROTECTION ON CTL PIN
ISL45042
CTL
0.01μF
1k
Ω
IOUT
--------------------
X
----------------------------
=
(EQ. 1)
VOUT
+
R1
R2
----------------------
AVDD 1
--------------------
X
(
)
----------------------------
–
=
(EQ. 2)
-
+
R
a
R
b
R
c
R
SET
-
+
ISL45042
SET
OUT
AVDD
R
1
R
2
AVDD
VCOM
VCOM
AVDD
R
1
= Ra
R
2
= Rb + Rc
R
SET
= (Ra(Rb + Rc)) / 20Rb
FIGURE 4. EXAMPLE OF THE REPLACEMENT FOR THE MECHANICAL POTENTIOMETER CIRCUIT USING THE ISL45042
ISL45042
相关PDF资料 |
PDF描述 |
|---|---|
| ISL45042 | LCD Module Calibrator |
| ISL45042IR-T | LCD Module Calibrator |
| ISL45042IR | LCD Module Calibrator |
| ISL45042IRZ | LCD Module Calibrator |
| ISL45042IRZ-T | LCD Module Calibrator |
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