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参数资料
| 型号： | ISL5239EVAL1 |
| 厂商： | Intersil Corporation |
| 英文描述： | Pre-Distortion Linearizer |
| 中文描述： | 预失真线性化电路 |
| 文件页数： | 13/31页 |
| 文件大小： | 653K |
| 代理商： | ISL5239EVAL1 |
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13
The address map and bit field details for the microprocessor
interface is shown in the Tables 2-48. The procedures for
reading and writing to this interface are provided below.
Microprocessor Read/Write Procedure
The ISL5239 offers the user microprocessor read/write
access to all of the configuration registers and the capture
memory.
Configuration Read/Write Procedure
Write Access to the Configuration Master
Registers
Perform a direct write to the configuration master registers
by setting up the address A<5:0>, data P<15:0>, enabling the
CS input, and generating WR strobe. The rising edge of the
WR initiates the transfer to the master register. Registers may
be written in any order.
1. Write the global control register 0x00.
2. Write all remaining registers sequentially.
3. Load all IFIP, PD, IFC, CM and ODC coefficients and
control words.
Read Access to the Configuration Slave Registers
1. Perform a direct read of a configuration register by
dropping the RD line low to transfer data from the register
selected by A<5:0> onto the data bus P<15:0>.
LUT Read/Write Procedure
Write Access to the LUT Memory
1. Perform a direct write to control word 0x13 by setting up
the address on A<5:0>, data on P<15:0>, and generating
a rising edge on WR. 0x13 selects the auto increment
mode and the LUT address as specified in bit 9:0.
2. Perform a direct write to any/all control words 0x14, 0x15,
or 0x16, in any order, by setting up the address on A<5:0>,
data on P<15:0>, and generating a rising edge on WR.
3. Perform a direct write to control word 0x17 by setting up
the address on A<5:0>, data on P<15:0>, and generating
a rising edge on WR. The WR updates the contents of
0x014-0x017 and performs the auto increment, if
enabled.
Read Access to the LUT
1. Perform a direct write to control word 0x13 by setting up
the address on A<5:0>, data on P<15:0>, and generating
a rising edge on WR. 0x13 selects the auto increment
mode and the LUT address as specified in bit 9:0.
2. Perform a direct read of any/all control words 0x14, 0x15,
0x16, in any order, by dropping the RD line low to transfer
data from the slave register selected by A<5:0> onto the
data bus P<15:0>.
3. Perform a direct read of control word 0x17 by dropping the
RD line low to transfer data from the slave register
selected by A<5:0> onto the data bus P<15:0>. Reading
from this control word performs the auto increment, if
enabled.
Capture Memory Read/Write Procedure
Indirect addressing is used to access the Capture Memory.
The control word 0x04, bit 12 selects whether the input or
feedback memory is accessed and bit 13 selects the auto
address increment or manual modes. Control word 0x0b is
the memory address, and words 0x0c and 0x0d combine to
form the 32-bit word which is written or read from the
memory. The write to 0x0d triggers the write to the memory
and the auto increment of the address, if enabled. When
reading feedback capture memory, 0x0c bits 3:0 will contain
the upper four bits, and 0x0d, bits 15:0 will be the remaining
15-bits.
Write Access to the Capture Memory
1. Perform a direct write to control word 0x04 by setting up
the address on A<5:0>, data on P<15:0>, and generating
a rising edge on WR. 0x04 selects the auto increment
mode and the input or feedback memories.
2. Perform a direct write to control word 0x0b by setting up
the address on A<5:0>, data on P<15:0>, and generating
a rising edge on WR. 0x0b selects the starting memory
address.
3. Perform a direct write to 0x0c by setting up the address on
A<5:0>, data on P<15:0>, and generating a rising edge on
WR.
4. Perform a direct write to control word 0x0d by setting up
the address on A<5:0>, data on P<15:0>, and generating
a rising edge on WR. The WR updates the contents of
0x0c and 0x0d and performs the auto increment, if
enabled.
RD
WR
A<5:0>
0x00
FIGURE 13. CONFIGURATION WRITE TRANSFER
P<15:0>
0x01 0x02
0x03
xxxx
0x04
0x05
RD
WR
A<5:0>
FIGURE 14. CONFIGURATION READ TRANSFER
P<15:0>
0X00
0X01 0X02
0X03
0X04
0X05
HI-Z
DATA VALID
ISL5239
相关PDF资料 |
PDF描述 |
|---|---|
| ISL5239 | Pre-Distortion Linearizer |
| ISL5239KI | Pre-Distortion Linearizer |
| ISL5239KIZ | Pre-Distortion Linearizer |
| ISL5416 | Four-Channel Wideband Programmable DownConverter |
| ISL5416EVAL | Four-Channel Wideband Programmable DownConverter |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL5239KI | 功能描述:音频 DSP PA LINEARIZER IND TEMP 1 0MM PITCH RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| ISL5239KIZ | 功能描述:音频 DSP PA LINEARIZER IND 0MM PITCH BGA PACKAG RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| ISL5314 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Digital Synthesizer |
| ISL5314_05 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Digital Synthesizer |
| ISL5314EVAL2 | 制造商:Intersil Corporation 功能描述:DEV TOOL FOR COMMLINK DIRECT DGTL SYNTHESIZER - Bulk |
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