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参数资料
| 型号： | ISL54100CQZ |
| 厂商： | Intersil |
| 文件页数： | 3/21页 |
| 文件大小： | 0K |
| 描述： | IC REGENERATOR TMDS 4:1 128-MQFP |
| 标准包装： | 66 |
| 应用： | 多媒体显示器，测试设备 |
| 接口： | I²C |
| 电源电压： | 3 V ~ 3.6 V |
| 封装/外壳： | 128-BFQFP |
| 供应商设备封装： | 128-MQFP（14x20） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
| 产品目录页面： | 1244 (CN2011-ZH PDF) |
11
FN6275.5
June 4, 2008
0x04
Termination Control (0x00)
0
Data Termination A
0: Channel A TMDS Data inputs terminated into 50
Ω
(normal operation)
1: Channel A TMDS Data inputs terminated into 100
Ω (for
paralleled inputs)
1
Data Termination B
0: Channel B TMDS Data inputs terminated into 50
Ω
(normal operation)
1: Channel B TMDS Data inputs terminated into 100
Ω (for
paralleled inputs)
2
Data Termination C
0: Channel C TMDS Data inputs terminated into 50
Ω
(normal operation)
1: Channel C TMDS Data inputs terminated into 100
Ω (for
paralleled inputs)
3
Data Termination D
0: Channel D TMDS Data inputs terminated into 50
Ω
(normal operation)
1: Channel D TMDS Data inputs terminated into 100
Ω (for
paralleled inputs)
4
Clk Termination A
0: Channel A TMDS Clock inputs terminated into 50
Ω
(normal operation)
1: Channel A TMDS Clock inputs terminated into 100
Ω (for
paralleled inputs)
5
Clk Termination B
0: Channel B TMDS Clock inputs terminated into 50
Ω
(normal operation)
1: Channel B TMDS Clock inputs terminated into 100
Ω (for
paralleled inputs)
6
Clk Termination C
0: Channel C TMDS Clock inputs terminated into 50
Ω
(normal operation)
1: Channel C TMDS Clock inputs terminated into 100
Ω (for
paralleled inputs)
7
Clk Termination D
0: Channel D TMDS Data inputs terminated into 50
Ω
(normal operation)
1: Channel D TMDS Data inputs terminated into 100
Ω (for
paralleled inputs)
0x05
Output Options (0x00)
0
Tri-state Clock
Outputs
0: Normal Operation
1: Clock outputs tri-stated (allows another chip to drive the
output clock pins)
1
Tri-state Data
Outputs
0: Normal Operation
1: Data outputs tri-stated (allows another chip to drive the
output data pins)
2
Invert Output
Polarity
0: Normal Operation
1: The polarity of the TMDS data outputs is inverted
(+ becomes -, - becomes +). TMDS clock unchanged.
3
Reverse Output
Order
0: Normal Operation
1: CH0 data is output on CH2 and CH2 data is output on
CH0. No change to CH1.
0x06
Data Output Drive (0x00)
3:0
Transmit Current
Transmit Drive Current for data signals, adjustable in
0.125mA steps. Clock current is fixed at 10mA.
0x0: 10mA
0x8: 11mA
0xF: 11.875mA
7:4
Transmit
Pre-emphasis
Drive boost (in 0.125mA steps) added during first half of
each bit period for data signals. Clock signals do not have
pre-emphasis.
0x0: 0mA
0x8: 1mA
0xF: 1.875mA
Register Listing (Continued)
ADDRESS
REGISTER (DEFAULT VALUE)
BIT(S)
FUNCTION NAME
DESCRIPTION
ISL54100, ISL54101, ISL54102
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL54100CQZ-EVAL | 制造商:Intersil Corporation 功能描述:ISL54100CQZ-EVAL EVALUATION BOARD - Bulk |
| ISL54100CQZ-EVALZ | 制造商:Intersil Corporation 功能描述:EVAL BD FOR ISL54100 TMDS REGENERATORS W/ MLTPLXRS - Bulk |
| ISL54100-EVM | 制造商:Intersil Corporation 功能描述:An Evaluation Board of Manual, automatic and infrared remote control,4:1 HDMI interface, and a CD of development files 制造商:Intersil Corporation 功能描述:An Evaluation Board of Manual, automatic and infrared remote control4:1 HDMI interface, and a CD of development files |
| ISL54100HDMI-EVALZ | 制造商:Intersil Corporation 功能描述:ISL54100HDMI EVALUATION BOARD, ROHS, 4HDMI IN, 1 HDMI OUT - Bulk |
| ISL54101ACQZ | 功能描述:IC TMDS REGEN W/MUX 128-MQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 标准包装:3,000 系列:- 应用:PDA，便携式音频/视频，智能电话 接口:I²C，2 线串口 电源电压:1.65 V ~ 3.6 V 封装/外壳:24-WQFN 裸露焊盘 供应商设备封装:24-QFN 裸露焊盘（4x4） 包装:带卷 (TR) 安装类型:表面贴装 产品目录页面:1015 (CN2011-ZH PDF) 其它名称:296-25223-2 |
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