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参数资料
| 型号： | ISL54102CQZ |
| 厂商： | Intersil |
| 文件页数： | 21/21页 |
| 文件大小： | 0K |
| 描述： | IC TMDS REGEN W/MUX 128MQFP |
| 标准包装： | 66 |
| 应用： | 显示器 |
| 接口： | I²C |
| 电源电压： | 3 V ~ 3.6 V |
| 封装/外壳： | 128-BFQFP |
| 供应商设备封装： | 128-MQFP（14x20） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
| 产品目录页面： | 1244 (CN2011-ZH PDF) |
9
FN6275.5
June 4, 2008
Register Listing
ADDRESS
REGISTER (DEFAULT VALUE)
BIT(S)
FUNCTION NAME
DESCRIPTION
0x00
Device ID (read only)
3:0
Device Revision
1 = initial silicon, 2 = second revision, etc.
7:4
Device ID
3 = ISL5410x
0x01
Channel Activity Detect (read only)
0
Channel A Active
0: TMDS clock not present on Channel A
1: TMDS clock detected on Channel A
1
Channel B Active
0: TMDS clock not present on Channel B
1: TMDS clock detected on Channel B
2
Channel C Active
0: TMDS clock not present on Channel C
1: TMDS clock detected on Channel C
3
Channel D Active
0: TMDS clock not present on Channel D
1: TMDS clock detected on Channel D
0x02
Channel Selection (0x0C)
1:0
Channel Select
Selects the input channel for the mux. These 2 bits are Read
Only if Auto Channel Select is enabled.
0: Channel A selected
1: Channel B selected
2: Channel C selected
3: Channel D selected
2
Auto Channel Select 0: Manual Channel Select (using bits 0 and 1).
1: Auto Channel Select. Mux always selects the active
channel with the highest priority. A = 1st (highest), B = 2nd,
C = 3rd, D = 4th (lowest) priority.
An active channel is a channel that has clock activity on its
TMDS clock lines. If no channels are active, the A channel
is selected. (default)
3
Hardware Channel
Select
0: Software channel selection (using bits 0-2 of this register)
1: Hardware channel selection (using “Auto Channel Select”
and “CH Sel 0/1” external pins) (default)
4
Reset
Full chip reset. Write a 1 to reset. Will set itself to 0 when
reset is complete.
5
Power-down
0: Normal Operation
1: Puts the chip in a minimal power consumption mode,
turning off all TMDS outputs and open-circuiting all TMDS
inputs.
This bit is OR'ed with the Power-down input pin. If either is
set, the chip will enter power-down. Serial
I/O stays operational in PD mode.
Note: When exiting Power-down, a termination resistor
Recalibration cycle must be run to re-trim the termination
resistors (see register 0x03[7]).
ISL54100, ISL54101, ISL54102
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