参数资料
型号: ISL54233IRUZ-T7A
厂商: Intersil
文件页数: 10/18页
文件大小: 0K
描述: IC INTERFACE
标准包装: 1
功能: 多路复用器
电路: 1 x 3:1
导通状态电阻: 15 欧姆
电压电源: 单电源
电压 - 电源,单路/双路(±): 2.7 V ~ 4.6 V
电流 - 电源: 6.5µA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 12-UFQFN
供应商设备封装: 12-uTQFN(2.2x1.4)
包装: 标准包装
其它名称: ISL54233IRUZ-T7ADKR
ISL54233
18
FN7918.0
December 21, 2011
Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)
6
B
E
A
D
0.10 C
2X
INDEX AREA
2
1
N
NX (b)
SECTION "C-C"
e
CC
5
CL
TERMINAL TIP
(A1)
L
0.10 C
2X
C
0.05 C
A
0.10 C
A1
LEADS COPLANARITY
0.10 M C A B
0.05 M C
PIN #1 ID
5
(DATUM B)
(DATUM A)
NX L
Nd
Ne
3
e
NX b
12
BOTTOM VIEW
SIDE VIEW
TOP VIEW
L12.2.2x1.4A
12 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC
PACKAGE
SYMBOL
MILLIMETERS
NOTES
MIN
NOMINAL
MAX
A
0.45
0.50
0.55
-
A1
-
0.05
-
A3
0.127 REF
-
b
0.15
0.20
0.25
5
D
2.15
2.20
2.25
-
E
1.35
1.40
1.45
-
e
0.40 BSC
-
k0.20
-
L
0.35
0.40
0.45
-
N12
2
Nd
3
Ne
3
θ
0-
12
4
Rev. 0 12/06
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on D and E side, re-
spectively.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be ei-
ther a mold or mark feature.
7. Maximum package warpage is 0.05mm.
8. Maximum allowable burrs is 0.076mm in all directions.
9. Same as JEDEC MO-255UABD except:
No lead-pull-back, "A" MIN dimension = 0.45 not 0.50mm
"L" MAX dimension = 0.45 not 0.42mm.
10. For additional information, to assist with the PCB Land Pattern
Design effort, see Intersil Technical Brief TB389.
10
2.30
0.40
0.45 (12x)
1.50
1
2
3
0.25 (12x)
0.40
TYPICAL RECOMMENDED LAND PATTERN
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