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参数资料
| 型号： | ISL54302IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 12/16页 |
| 文件大小： | 0K |
| 描述： | IC SWITCH QUAD SPST 20QFN |
| 标准包装： | 6,000 |
| 功能： | 开关 |
| 电路： | 4 x SPST - NO |
| 导通状态电阻： | 2 欧姆 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VFQFN 裸露焊盘 |
| 供应商设备封装： | 20-QFN（4x4） |
| 包装： | 带卷 (TR) |
5
March 19, 2008
SW-CTRL (1-4) Into CS_Latch
Setup Time
Full
1
ns
SW-CTRL (1-4) Into CS_Latch Hold
Time
Full
3.5
ns
Input Current, IINH, IINL
VIN = 0V or VLOGIC
Full
-1
0.01
1
A
CS_LATCH Rise, Fall Time
10% to 90% and 90% to 10%
Full
3
ns
CS_LATCH Minimum Pulse Width
Rising to Falling Edge 50% Points
Full
10
ns
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
VXA or VXB = 3V, RL = 300Ω, CL = 35pF
(see Figure 1)
25
ns
Full
30
ns
Turn-OFF Time, tOFF
VXA or VXB = 3V, RL = 300Ω, CL = 35pF
(see Figure 1)
25
80
ns
Full
85
ns
OFF Capacitance, COFF
f = 1MHz, VXA or VXB = VCOM = 0V
25
50
pF
ON Capacitance, CCOM(ON)
f = 1MHz, VXA or VXB = VCOM = 0V
25
100
pF
OFF Isolation
RL = 50Ω, CL = 15pF, f = 1MHz,
25
-45
dB
Crosstalk (Note 5)
25
-65
dB
Switch Contact 3dB Bandwidth
RL = 50Ω, CL = 5pF
25
60
MHz
Charge Injection, Q
25
pC
POWER SUPPLY CHARACTERISTICS
VPLUS Supply, I (Quiescent)
25
13
A
Full
15
45
A
VPLUS Supply, I (40MHz)
25
18
A
Full
20
A
VSS Supply, I (Quiescent)
25
14
A
Full
19
50
A
VSS Supply, I (40MHz)
25
0.7
mA
Full
0.7
mA
VDD Supply, I (Quiescent)
25
1
A
Full
4
10
A
VDD Supply, I (40MHz)
25
0.4
mA
Full
0.5
mA
VLOGIC Internal Logic Supply, I
(Quiescent)
25
0
A
Full
1
10
A
VLOGIC Internal Logic Supply, I
(40MHz)
25
3.2
mA
Full
3.2
mA
NOTES:
4. Flatness is defined as the delta between the maximum and minimum rON values over the specified voltage range.
5. Between any two switches.
6. CS_LATCH must remain low when changing SW-CTRL(1-4) condition. Likewise, while CS_LATCH is being toggled, it is important to keep SW-
CTRL(1-4) in the intended switch condition.
7. Typical Values are not production tested
8. Digital Characteristics remain stable with respect to VPLUS and VSS variation. These parameters are controlled by the difference between VSS
and VDD, which the user should maintain at a constant spread of VDD = VSS + 3V.
9. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.
10. Limits established by characterization and are not production tested.
Electrical Specifications
Test Conditions: VPLUS = +7V, VSS = 0V Supply, VLOGIC= 3V, VDD = 3V, GND = 0V, VINH = 2.2V, VINL = 0.8V,
Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 9)
TYP
(Note 10)
MAX
(Note 9)
UNITS
ISL54302
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