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参数资料
| 型号： | ISL58115CRZ-EVAL |
| 厂商： | Intersil |
| 文件页数： | 2/9页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR ISL58115CRZ |
| 标准包装： | 1 |
| 系列： | * |
ISL58115
Pin Configuration
ISL58115
(24 LD QFN)
TOP VIEW
NC 1
DATA 2
DATAB 3
19 NC
18 GND
17 VCC
THERMAL
Pin Descriptions
PIN
PIN
GND 4
DIS 5
NC 6
NC 7
THERMAL
PAD
16 IOUT
15 VCC
14 VCC
13 PDIN
NAME
DATA
DATAB
GND
DIS
NC
NUMBER
2
3
4, 18, 24
5
1, 6, 7, 19,
I/O
I
I
I
I
TYPE
LVDS
LVDS
Ground
Digital
No connect
DESCRIPTION
Input data to control Laser Switching Control
Input data to control Laser Switching Control
Ground
Disable output current
No connect
23
CHPEN
RPS
RBIAS
RSET
IVOUT
8
9
10
11
12
I
I
O
O
Digital
Analog
Analog
Analog
Analog
Chip Enable; Pull High to Enable
External resistor sets the Hsync detection power
Resistors set bias threshold current. See “Applications Information” on page 7 for more details
Bandgap derived internal reference
Calibrate channel with an external trimpot to GND
Adjust the IV amplifier gain
PDIN
VCC
IOUT
HPSB
13
14, 15, 17
16
20
I
O
I
Analog
Power
Analog
TLL
Photo Diode input to the IV amplifier
Supply Voltage
Laser Current Output
Hsync Power Select Enable; Active Low. During HPSB is low AND Hsync signal from photo
detector is low, the output current is set by RPS
CALB
VC
Thermal
21
22
-
I
I
TTL
Analog
Samples the laser power for APC; Active Low
Voltage Controlling Laser Switching Current; 0V to 2V input for 0% to 100% output
Exposed Thermal Pad should be soldered to GND
Pad
NOTE: Pins with the same name are not necessary internally connected together. LDD pins must not be used for connecting together external components
or features.
2
FN6671.1
July 29, 2013
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