参数资料
型号: ISL6144IRZA-T
厂商: Intersil
文件页数: 5/30页
文件大小: 0K
描述: IC CTRLR MOSFET HV ORING 20-QFN
标准包装: 6,000
应用: 电信/数据通信系统
FET 型: N 沟道
输出数: 1
内部开关:
延迟时间 - 开启: 1ms
延迟时间 - 关闭: 250ns
电源电压: 9 V ~ 75 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 20-VQFN 裸露焊盘
供应商设备封装: 20-QFN 裸露焊盘(5x5)
包装: 带卷 (TR)
ISL6144
Absolute Maximum Ratings (Note 8) T A = +25°C
V IN, V OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +100V
GATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V IN +12V
HVREF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V IN -5V
COMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V OUT
VSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V OUT -5V
FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance (Typical) θ JA (°C/W) θ JC (°C/W)
TSSOP Package (Note 9) . . . . . . . . . . 90 N/A
QFN Package (Notes 10, 11) . . . . . . . . 35 5
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
Operating Conditions
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . +9V to +75V
Temperature Range (T A ) . . . . . . . . . . . . . . . . . . . . -40°C to +105°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
8. All voltages are relative to GND, unless otherwise specified.
9. θ JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
10. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379 .
11. For θ JC , the "case temp" location is the center of the exposed metal pad on the package underside.
Electrical Specifications
V IN = 48V, T A = -40°C to +105°C, Unless Otherwise Specified. Boldface limits apply over the operating
temperature range, -40°C to +105°C.
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(Note 12)
TYP
(Note 12) UNITS
BIAS “V IN ”
POR Rising
12V Bias Current
48V Bias Current
75V Bias Current
POR L2H
I 12V
I 48V
I 75V
V IN Rising to V GATE > V IN + 7.5V
V IN = 12V, V GATE = V IN + V GQP
V IN = 48V, V GATE = V IN + V GQP
V IN = 75V, V GATE = V IN + V GQP
8.9
-
-
-
-
3.5
4.5
5
-
-
-
-
V
mA
mA
mA
GATE
Charge Pump Voltage
Gate Low Voltage Level
Low Pull Down Current
High Pull Down Current
Slow Turn-off Time
Fast Turn-off Time
Start-up “Turn-On” Time
GATE Turn-On Current
V GQP
V GL
I PDL
I PDH
t toffs
t toff
t ON
I ON
V IN = 12V to 75V
V IN - V OUT < 0V
Cgs = 39nF, I PDL = Cgs*dVgs/T tofs
Cgs = 39nF, I PDH = Cgs*dVgs/T toff
Cgs = 39nF
Turn-off from V GATE = V IN + V GQP to V IN + 1V with
Cgs = 39nF (includes HS Comparator delay time)
Turn-on from V GATE = V IN to V IN + 7.5V into 39nF
V IN = 9V to 75V
V IN + 9
-0.3
-
-
-
-
-
-
V IN + 10.5
V IN
5
2
-
250
1
1
V IN + 12
V IN + 0.5
-
-
100
300
-
-
V
V
mA
A
μs
ns
ms
mA
CONTROL AND REGULATION I/O
HR Amplifier Forward Voltage
Regulation
HS COMP Externally
Programmable Threshold
HS Comparator Offset Voltage
Comp Input Current
(Bias Current)
HVREF Voltage (V IN - HVREF)
V FWD_HR
V TH(HS)
V OS(HS)
I COMP
HV REF(VZ)
ISL6144 controls voltage across FET Vds to
V FWD_HR during static forward operation at loads
resulting in I * r DS(ON) < V FWD_HR
Externally programmable threshold for noise
sensitivity (system dependent), typical 0.05V to 0.3V
V IN = 9V to 75V
10
0
-40
-
-
20
0.05
0
1.1
5.5
30
5.3
25
-
-
mV
V
mV
μA
V
5
FN9131.7
October 6, 2011
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