参数资料
型号: ISL6144IVZA
厂商: Intersil
文件页数: 26/30页
文件大小: 0K
描述: IC CTRLR MOSFET ORING HV 16TSSOP
标准包装: 96
应用: 电信/数据通信系统
FET 型: N 沟道
输出数: 1
内部开关:
延迟时间 - 开启: 1ms
延迟时间 - 关闭: 250ns
电源电压: 9 V ~ 75 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 管件
产品目录页面: 1243 (CN2011-ZH PDF)
ISL6144
PCB Layout Considerations
The ISL6144EVAL1Z uses a 4 layer PCB with 1oz external
layers and 2oz internal layers, dedicated ground and power
planes are used to insure good efficiency and EMC
performance. Other layer stack-up and thickness is possible
depending on the particular power system.
The power traces are designed to handle at least 20A of
load per feed. Power and ground planes are made of 2oz
copper and external signal/power layers are 1oz copper.
The loop area for all power traces is minimized to reduce
parasitic inductance.
A ground island can be created under the IC and connected
to the power ground at a single point for reduction of noise
that may be injected from the power ground into the IC
ground.
Component Selection Summary
Component selection is listed for one feed and is applicable
for all other parallel feeds.
R 1 , R 2 - are resistors that define the HS comparator
threshold voltage used in the high speed turn-off. The sum of
R1+ R2 ? 50k Ω. R1 and R2 are found using Equation 17.
R 3 - is a pull-up resistor on the FAULT pin that can be used if
LED1 is not used. FAULT is an open drain that can be used
to interface with an optocoupler, LED or directly to a logic
circuit. This resistor is not populated on the EVAL board.
R 4 - is the FAULT pin LED current limit resistor, R4 is chosen
to have an LED current of about 4mA.
C 1 - is the HVREF Capacitor, placed between VIN and
HVREF pins, this capacitor is necessary to stabilize the
HV REF(VZ) supply and a value of 150nF is sufficient.
Increasing this value will result in gate turn-on time increase.
C 2 - is the COMP Capacitor, Placed between VOUT and
COMP pins to provide filtering and decoupling. A 10nF
capacitor is adequate for most cases.
C 5 , C 6 - are VIN and VOUT local decoupling capacitors,
help immunize the pins against transients that might result in
case of fast speed gate turn-off.
Q 1 -Q 3 - are ORing MOSFET(s), number of paralleled
MOSFETs depends on device r DS(ON) , maximum allowable
losses and junction temperature of the ORing MOSFETs.
U3 - is Intersil’s ISL6144 High Voltage ORing MOSFET
Controller IC.
LED1 - is a red LED used to indicate first feed faults. When
V IN 1 is off while V OUT and auxiliary 5V supply are present
LED1 will be red.
List of Test Points and Connectors
V IN 1 - J4
26
SOURCE1 - TP1, TP17
DRAIN1 - TP2, TP18
GATE1 - TP13
HVREF1 - TP9
COMP1 - TP11
VSET1 - TP10
FAULT1 - TP3
V IN 2 - J7
SOURCE2 - TP4, TP21
DRAIN2 - TP5, TP22
GATE2 - TP14
HVREF2 - TP8
COMP2 -TP12
VSET2 - TP7
FAULT2 - TP6
V OUT - J2 and J5 (connect to J1 when V OUT replace LED
AUX PS)
GND - J3, J6, J8, TP24-TP27
V+5V - (AUX PS for LEDs) - J1
FN9131.7
October 6, 2011
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