参数资料
型号: ISL6218CVZA
厂商: Intersil
文件页数: 4/19页
文件大小: 0K
描述: IC CTRLR INTEL PENT M 38-TSSOP
标准包装: 50
应用: 处理器
电流 - 电源: 1.4mA
电源电压: 4.75 V ~ 5.25 V
工作温度: -10°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 38-TFSOP(0.173",4.40mm 宽)
供应商设备封装: 38-TSSOP
包装: 管件
ISL6218
Electrical Specifications
Operating Conditions: V DD = 5V, T A = -10°C to +85°C, Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ISEN
Full Scale Input Current
-
32
-
μA
Overcurrent Threshold
Soft-Start Current
Droop Current
ROCSET = 110k (see Figure 10)
SOFT = 0V
ISEN = 32μA
-
-
12.0
54
31
14
-
-
16.0
μA
μA
μA
GATE DRIVER
UGATE Source Resistance
UGATE Source Current (Note 4)
UGATE Sink Resistance
UGATE Sink Current (Note 4)
LGATE Source Resistance
LGATE Source Current (Note 4)
LGATE Sink Resistance
LGATE Sink Current (Note 4)
500mA Source Current
V UGATE-PHASE = 2.5V
500mA Sink Current
V UGATE-PHASE = 2.5V
500mA Source Current
V LGATE = 2.5V
500mA Sink Current
V LGATE = 2.5V
-
-
-
-
-
-
-
-
1
2
1
2
1
2
0.5
4
1.5
-
1.5
-
1.5
-
0.8
-
Ω
A
Ω
A
Ω
A
Ω
A
BOOTSTRAP DIODE
Forward Voltage
VDDP = 5V, Forward Bias Current = 10mA
0.57
0.68
0.74
V
POWER GOOD MONITOR
PGOOD Sense Current
PGOOD Pull-Down MOSFET r DS(ON)
2.43
56
-
63
-
82
mA
Ω
Undervoltage Threshold
VSEN Rising
-
85.0
-
%
(VSEN/VREF)
Undervoltage Threshold
VSEN Falling
-
84.0
-
%
(VSEN/VREF)
PGOOD Low Output Voltage
I PGOOD = 4mA
-
0.26
0.4
V
LOGIC THRESHOLD
EN, DSEN, DRSEN Low
EN, DSEN, DRSEN High
-
2
-
-
1
-
V
V
PROTECTION
Overvoltage Threshold (V SEN /V REF )
V SEN Rising
-
112.0
-
%
DELAY TIME
Delay Time from LGATE Falling to
VDDP = 5V, BOOT to PHASE = 5V, UGATE - PHASE = 1V,
10
18
30
ns
UGATE Rising
LGATE = 1V
Delay Time from UGATE Falling to
VDDP = 5V, BOOT to PHASE = 5V, UGATE - PHASE = 1V,
10
18
30
ns
LGATE Rising
4
LGATE = 1V
FN9101.6
August 6, 2007
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