参数资料
型号: ISL6223CAZA-T
厂商: Intersil
文件页数: 10/15页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 20-SSOP
标准包装: 2,500
PWM 型: 控制器
输出数: 2
频率 - 最大: 305kHz
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 20-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
R IN
R FB
C c
FB
COMP
ISL6223
V IN
ERROR
AMPLIFIER
-
+
SAWTOOTH
GENERATOR
CORRECTION
+
COMPARATOR
-
+
PWM
CIRCUIT
PWM
HIP6601
Q2
Q1
L 01
I L
V CORE
-
PHASE
REFERENCE
DAC
DIFFERENCE
+
CURRENT
I SEN
R ISEN
SENSING
TO OTHER
CHANNEL
-
CURRENT
SENSING
FROM
ONLY ONE OUTPUT
STAGE SHOWN
OTHER
TO OVER
AVERAGING
CHANNEL
INDUCTOR
-
CURRENT
TRIP
+
COMPARATOR
REFERENCE
CURRENT
FROM
OTHER
CHANNEL
FIGURE 8. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM SHOWING CURRENT AND VOLTAGE SAMPLING
CORE Voltage Programming
The voltage identification pins (VID0, VID1, VID2, VID3 and
VID4) set the CORE output voltage. Each VID pin is pulled to
V CC by an internal 12μA current source and accepts
open-collector/open-drain/open-switch-to-ground or
standard low-voltage TTL or CMOS signals.
Table 1 shows the nominal DAC voltage as a function of the
VID codes. The power supply system is ± 1% accurate over
the operating temperature and voltage range.
Current Sensing and Balancing
Overview
2. Reduce the regulator output voltage with increasing load
current (droop)
3. Balance the I L currents in the two phases
Overcurrent, Selecting R ISEN
The current detected through the R ISEN resistor is averaged
with the current detected in the other channel. The averaged
current is compared with a trimmed, internally generated
current, and used to detect an overcurrent condition.
The nominal current through the R ISEN resistor should be
50 μ A at full output load current, and the nominal trip point for
overcurrent detection is 150% of that value, or 75μA.
Therefore:
The ISL6223 samples the on-state voltage drop across each
synchronous rectifier FET, Q2, as an indication of the
R ISEN = I L × r DS ( ON ) ( Q2 ) ? 50 μ A
(EQ. 1)
inductor current in that phase, see Figure 8. Neglecting AC
effects (to be discussed later), the voltage drop across Q2 is
simply r DS(ON) (Q2) x inductor current (I L ). Note that I L , the
inductor current, is 1/2 of the total current (I LT ).
The voltage at Q2’s drain, the PHASE node, is applied to the
R ISEN resistor to develop the I ISEN current to the ISL6223
ISEN pin. This pin is held at virtual ground, so the current
through R ISEN is I L x r DS(ON) (Q2) / R ISEN .
The I ISEN current provides information to perform the
following functions:
1. Detection of an overcurrent condition
10
For a full load of 25A per phase, and an r DS(ON) (Q2) of
4m Ω , R ISEN = 2k Ω .
The overcurrent trip point would be 150% of 25A, or
approximately 37.5A per phase. The R ISEN value can be
adjusted to change the overcurrent trip point, but it is
suggested to stay within ± 25% of nominal.
Droop, Selection of R IN
The average of the currents detected through the R ISEN
resistors is also steered to the FB pin. There is no DC return
path connected to the FB pin except for R IN , so the average
current creates a voltage drop across R IN . This drop increases
the apparent V CORE voltage with increasing load current,
causing the system to decrease V CORE to maintain balance at
FN9013.3
July 9, 2008
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