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参数资料
| 型号： | ISL6228LOEVAL3Z |
| 厂商： | Intersil |
| 文件页数： | 9/16页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL6228LO |
| 标准包装： | 1 |
| 系列： | Robust Ripple Regulator™ (R³) |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 2，非隔离 |
| 输出电压： | 1.5V 或 1.8V，1.8V |
| 电流 - 输出： | 8A，8A |
| 输入电压： | 3.3 ~ 25 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 270kHz，300kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL6228 |
ISL6228
pins. The power for the LGATE gate-driver is sourced
directly from the PVCC pin. The power for the UGATE gate-
driver is sourced from a “boot” capacitor connected across
the BOOT and PHASE pins. The boot capacitor is charged
from a 5V bias supply through a “boot diode” each time the
low-side MOSFET turns on, pulling the PHASE pin low. The
ISL6228 has an integrated boot diode connected from the
PVCC pin to the BOOT pin.
detected positive voltage and LGATE was allowed to go high
for eight consecutive PWM switching cycles. The ISL6228
will turn off the low-side MOSFET once the phase voltage
turns positive, indicating negative inductor current. The
ISL6228 will return to CCM on the following cycle after the
PHASE pin detects negative voltage, indicating that the body
diode of the low-side MOSFET is conducting positive
inductor current.
Efficiency can be further improved with a reduction of
UGATE
LGATE
t LGFUGR
50%
50%
t UGFLGR
unnecessary switching losses by reducing the PWM
frequency. It is characteristic of the R 3 architecture for the
PWM frequency to decrease while in diode emulation. The
extent of the frequency reduction is proportional to the
reduction of load current. Upon entering DEM, the PWM
frequency makes an initial step-reduction because of a 33%
step-increase of the window voltage V W .
Overcurrent Protection
The overcurrent protection (OCP) setpoint is programmed
with resistor R OCSET that is connected across the OCSET
and PHASE pins.
L
FIGURE 4. LGATE AND UGATE DEAD-TIME
Diode Emulation
PHASE
ISL6228
+
DCR
R OCSET
V DCR
C SEN
I L
_
V O
C O
The ISL6228 implements forced continuous-conduction-
mode (CCM) at heavy load and diode-emulation-mode
(DEM) at light load, to optimize efficiency in the entire load
range. The transition is automatically achieved by detecting
10μA
OCSET
VO
+ V ROCSET
R O
_
the output load current.
Positive-going inductor current flows from either the source
of the high-side MOSFET, or the drain of the low-side
MOSFET. Negative-going inductor current flows into the
drain of the low-side MOSFET. When the low-side MOSFET
conducts positive inductor current, the phase voltage will be
negative with respect to the GND and PGND pins.
FIGURE 5. OVERCURRENT-SET CIRCUIT
Figure 5 shows the overcurrent-set circuit. The inductor
consists of inductance L and the DC resistance DCR. The
inductor DC current I L creates a voltage drop across DCR,
given by Equation 3:
Conversely, when the low-side MOSFET conducts negative
inductor current, the phase voltage will be positive with
V DCR = I L ? DCR
(EQ. 3)
respect to the GND and PGND pins. The ISL6228 monitors
the phase voltage, when the low-side MOSFET is
conducting inductor current, to determine the direction of the
The ISL6228 sinks 10μA current into the OCSET pin,
creating a DC voltage drop across the resistor R OCSET ,
given by Equation 4:
inductor current.
V ROCSET = 10 μ A ? R OCSET
(EQ. 4)
When the output load current is greater than or equal to ?
the inductor ripple current, the inductor current is always
positive, and the converter is always in CCM. The ISL6228
minimizes the conduction loss in this condition by forcing the
low-side MOSFET to operate as a synchronous rectifier.
When the output load current is less than ? the inductor
ripple current, negative inductor current occurs. Sinking
negative inductor through the low-side MOSFET lowers
efficiency through unnecessary conduction losses. The
ISL6228 automatically enters DEM after the PHASE pin has
9
Resistor R O is connected between the VO pin and the actual
output voltage of the converter. During normal operation, the
VO pin is a high impedance path, therefore there is no
voltage drop across R O . The DC voltage difference between
the OCSET pin and the VO pin can be established using
Equation 5:
V OCSET – V VO = V DCR – V ROCSET = I L ? DCR – 10 μ A ? R OCSET
(EQ. 5)
FN9095.2
May 7, 2008
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