参数资料
型号: ISL6263DHRZ
厂商: Intersil
文件页数: 15/17页
文件大小: 0K
描述: IC VREG 3BIT 1PHASE 32-QFN
标准包装: 60
应用: 转换器,GPU 内核电源
输入电压: 5 V ~ 25 V
输出数: 1
输出电压: 0.7 V ~ 1.09 V
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-QFN(5x5)
包装: 管件
ISL6263D
actual inductor current information, R S and C N simply provide
noise filtering. A low ESL sense resistor is strongly
and given the output current I O , the IMON voltage is
determined by Equation 26:
V IMON = 31 ? I O ? R SNS ? ? 1 + ------------- ?
recommended for R SNS because this parameter is the most
significant source of noise that affects discrete resistor sense.
It is recommended to start out using 100 ? for R S and 47pF for
C N . Since the current sense resistance changes very little
with temperature, the NTC network is not needed for thermal
? R IS2 ?
? R IS1 ?
R S , R P , R IS1 , R IS2 should be adjusted to meet the
requirement (V ICOMP(max) - V O ) > 25mV.
(EQ. 26)
V RSNS = I O ? R SNS
V N = V RSNS ? ----------------------
R + R (EQ. 21)
V ICOMP = V O + V ? ? 1 + ------------- ?
V ICOMP ( max ) – V O = I OC ? R SNS ? ? ? 1 + ------------- ? (EQ. 23)
R P ? R IS2 ?
R S + R P ?
R IS1 ?
V IMON = 31 ? I O ? R SNS ? ---------------------- ? ? 1 + ------------- ?
compensation. Discrete resistor sense design follows the
same approach as inductor DCR sense. The voltage on the
current sense resistor is given by Equation 20:
(EQ. 20)
It is optional to parallel a resistor R P to form a voltage divider
with R S to obtain more flexibility. Assume the voltage across
R P is V N , which is given by Equation 21:
R P
S P
The current sense amplifier output voltage V ICOMP is given
by Equation 22:
? R IS2 ?
N ? R IS1 ? (EQ. 22)
Given a current sense resistor R SNS and the overcurrent set
point I OC , the maximum voltage of ICOMP pin is determined
by Equation 23:
----------------------
Given the output current I O , the current monitor IMON
voltage can be determined by Equation 24:
R P ? R IS2 ? (EQ. 24)
R S + R P ? R IS1 ?
If R P is not used, the maximum voltage of ICOMP pin is
determined by Equation 25:
The current sense traces should be routed directly to the
current sense resistor pads for accurate measurement.
However, due to layout imperfection, the calculated R IS2
may still need slight adjustment to achieve optimum load line
slope. It is recommended to adjust R IS2 after the system has
achieved thermal equilibrium at full load.
Dynamic Mode of Operation - Compensation
Parameters
Intersil provides a spreadsheet to calculate the compensator
parameters. Caution needs to be used in choosing the input
resistor to the FB pin. Excessively high resistance will cause
an error to the output voltage regulation due to the bias
current flowing through the FB pin. It is recommended to
keep this resistor below 3k ? .
Layout Considerations
As a general rule, power should be on the bottom layer of
the PCB and weak analog or logic signals are on the top
layer of the PCB. The ground-plane layer should be adjacent
to the top layer to provide shielding.
Inductor Current Sense and the NTC Placement
It is crucial that the inductor current be sensed directly at the
PCB pads of the sense element, be it DCR sensed or discrete
resistor sensed. The effect of the NTC on the inductor DCR
thermal drift is directly proportional to its thermal coupling with
the inductor and thus, the physical proximity to it.
Signal Ground and Power Ground
V ICOMP ( max ) – V O = I OC ? R SNS ? ? 1 + ------------- ?
? R IS2 ?
? R IS1 ?
(EQ. 25)
VDD
The ground plane layer should have a single point connection
to the analog ground at the VSS pin. The VSS island should
be located under the IC package along with the weak analog
OCP
-
+
10 μ A
+
OCSET
ISP
R OCSET
R S
+
Isense
-
ISN
ICOMP
-
VO
R P
V RSNS
(optional)
FIGURE 9. EQUIVALENT MODEL OF CURRENT SENSE USING DISCRETE RESISTOR CURRENT SENSE
15
FN6753.1
July 8, 2010
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