参数资料
型号: ISL6265CHRTZ-T
厂商: Intersil
文件页数: 12/27页
文件大小: 0K
描述: IC CTRLR MULTI-OUTPUT 48TQFN
标准包装: 4,000
应用: 控制器,AMD SVI 兼容移动式 CPU
输入电压: 5 V ~ 24 V
输出数: 3
输出电压: 0.5 V ~ 1.55 V
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 带卷 (TR)
ISL6265C
Electrical Specifications VCC = PVCC = 5V, V IN = 12V, T A = -10°C to +100°C (ISL6265HRTZ), T A = -40°C to +100°C (ISL6265IRTZ),
unless otherwise specified. Boldface limits apply across the operating temperature range, -40°C to +100°C. (Continued)
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(Note 6)
TYP
(Note 6)
UNITS
BOOTSTRAP DIODE
Forward Voltage
HRTZ
V DDP = 5V, Forward Bias Current = 2mA
0.43
0.58
0.67
V
Leakage
IRTZ
V DDP = 5V, Forward Bias Current = 2mA
V R = 16V
0.43
-
0.58
-
0.70
5
V
μA
POWER-GOOD AND PROTECTION MONITOR
PGOOD Low Voltage
PGOOD Leakage Current
PGOOD High After Soft-Start
PGOOD Low After Fault
Undervoltage Threshold
Overvoltage Threshold
V OL
I OH
HRTZ
U VH
IRTZ
U VH
O VHS
I PGOOD = 4mA
P GOOD = 5V
Enable to PGOOD High, V COREx = 1.1V
Fault to PGOOD Low
V COREx falls below set-point for 208μs
V COREx falls below set-point for 208μs
V O rising above threshold > 0.5μs
-
-1
570
160
240
230
1.770
0.2
-
700
208
295
295
1.800
0.5
1
1010
250
350
350
1.825
V
μA
μs
μs
mV
mV
V
OVERCURRENT PROTECTION VDD0 AND VDD1
OCSET Reference Voltage
(V ISPx - V ISNx )
V OCSET = 180mV; VIN = 15.5V
5
6.0
7
mV
OVERCURRENT PROTECTION VDD_NB
OCSET_NB OCP Current
HRTZ
RBIAS pin to GND = 117k ? ; Trips after 8 PWM
9.2
10
10.8
μA
cycles
IRTZ
RBIAS pin to GND = 117k ? ; Trips after 8 PWM
9.2
10
10.9
μA
cycles
OFFSET FUNCTION
OFS Pin Voltage For Droop Enabling
FB Pin Source Current
OFS Pin Voltage Threshold for VFIX
Mode and No Droop Operation
OFS Pin Voltage Threshold for SVI
Mode and No Droop Operation
OFS Bias
HRTZ
V OFS
IRTZ
V OFS
I FB
V OFS
V OFS
I OFS
R OFS = 240k ? (OFS pin to GND)
R OFS = 240k ? (OFS pin to GND)
I OFS = =10μA
1.8V < OFS < VCC
1.18
1.17
9.0
-
-
-
1.2
1.2
9.9
1.8
4.0
4.0
1.22
1.23
10.8
-
-
-
V
V
μA
V
V
μA
LOGIC INPUTS
ENABLE Low Threshold
ENABLE High Threshold
ENABLE Leakage Current
V IL(3.3V)
V IH(3.3V)
Logic input is low
Logic input is high at 3.3V
-
2.0
-1
-
1.35
1.6
0
0
0.9
-
-
1
V
V
μA
μA
SVI INTERFACE
PWROK Input Low Threshold
PWROK Input High Threshold
SVC, SVD Input HIGH (VIH)
SVC, SVD Input LOW (VIL)
Schmitt Trigger Input Hysteresis
-
-
1.05
-
-
0.65
0.9
0.87
0.68
0.19
0.8
-
-
0.45
-
V
V
V
V
V
12
FN6976.2
January 11, 2013
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