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参数资料
| 型号： | ISL6271AEVAL1 |
| 厂商： | Intersil |
| 文件页数： | 6/13页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL6271A |
| 标准包装： | 1 |
| 主要目的： | DC/DC，LDO 步降 |
| 输出及类型： | 3，非隔离 |
| 输出电压： | 0.85 ~ 1.6V，1.1V，1.3V |
| 电流 - 输出： | 800mA，50mA，40mA |
| 输入电压： | 2.76 ~ 5.5V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 1.2MHz |
| 板类型： | 完全填充 |
| 已供物品： | 板，线缆 |
| 已用 IC / 零件： | ISL6271A |
Setup Instructions for the ISL6271A Evaluation Kit
Transient Load Testing w/onboard Transient Generator
The onboard transient generator function permits dynamically changing the load current on Vcore and is enabled by
placing a shunt across H4 pins 2-3 (while H1 is enabled), see Figure 1 . This periodically connects and disconnects a
5 ohm load across the Vcore output at about a 1 second interval, corresponding to about a 250mA pulse load on the
output at 1.3V. H4 pin 2 can then be used to trigger the scope and observe the effect on Vcore each time this load
switches in either the positive or negative direction, thus observing the transient response of the Vcore regulator. This
is illustrated below in Figure 9 with a 10mA external load bias applied. (Note: The output load can be biased to some
DC level by an external load connected through J3) . A programmable external load may provide more versatility for
transient load testing, but this on-board capability gives an excellent read on the regulators response characteristic.
V core
H4-Pin2
FIGURE 9.
V CORE TRANSIENT RESPONSE (10MA – 250MA)
Efficiency Measurement Considerations
Since the ISL6271A is a multi-regulator PMIC, it is important to segregate the regulators as much as possible when
attempting accurate efficiency measurements on the core regulator. The power input to the LDOs (LVCC) can be tied
to the main PVCC input by a strap on H2, but should be separated from the core regulator input voltage (PVCC)
during efficiency measurements. All other extraneous draw from PVCC should be removed, such as the LED power
and the transient generator circuitry. Removing the shunt from H1 effectively removes power from both the LED and
transient-generator circuits, and prepares the circuit for core regulator efficiency measurements.
Another drain to take into consideration, if efficiency testing is being done under static VID control, is the 100K pull-up
resistors for the switches in S1, which will drain 30-40uA each from PVCC when in the ‘right’ position. If testing is
being done at an output voltage of less than 1.3V (all ‘left’), then the number of switches in the ‘right’ position should
be factored into the efficiency calculation. This should be a relatively insignificant factor at higher output current
levels, but it is a factor to be cognizant of.
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相关代理商/技术参数 |
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|---|---|
| ISL6271CR | 制造商:Rochester Electronics LLC 功能描述:PLL & SRAM REGULATOR FOR INTEL PROCESSORS - Bulk 制造商:Intersil Corporation 功能描述: |
| ISL6271EVAL1 | 制造商:Intersil Corporation 功能描述:ISL6271, PLL & SRAM REGULATOR FOR INTEL PROCESSORS EVALUATIO - Bulk |
| ISL6273 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:1.2A Low Quiescent Current 1.5MHz High Efficiency Synchronous Buck Regulator |
| ISL6273EVAL1 | 功能描述:EVAL BOARD 1 FOR ISL6273 RoHS:否 类别:编程器，开发系统 >> 评估板 - 线性稳压器 (LDO) 系列:* 产品变化通告:1Q2012 Discontinuation 30/Mar/2012 设计资源:NCP590MNDPTAGEVB Gerber Files 标准包装:1 系列:- 每 IC 通道数:2 - 双 输出电压:1.8V，2.8V 电流 - 输出:300mA 输入电压:2.1 ~ 5.5 V 稳压器类型:正，固定式 工作温度:-40°C ~ 85°C 板类型:完全填充 已供物品:板 已用 IC / 零件:NCP590MNDP 其它名称:NCP590MNDPTAGEVB-NDNCP590MNDPTAGEVBOS |
| ISL6273IRZ | 功能描述:IC BUCK SYNC ADJ 1.2A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:4.5V 输入电压:2.65 V ~ 4.35 V PWM 型:电流模式 频率 - 开关:3.5MHz 电流 - 输出:800mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:9-UFBGA，DSBGA 包装:Digi-Reel® 供应商设备封装:9-DSBGA（1.2x1.3） 其它名称:296-29764-6 |
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