参数资料
型号: ISL62872HRUZ-T
厂商: Intersil
文件页数: 14/25页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 20-TQFN
标准包装: 3,000
系列: Robust Ripple Regulator™ (R³)
PWM 型: 控制器
输出数: 1
频率 - 最大: 330kHz
占空比: 100%
电源电压: 3.3 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -10°C ~ 100°C
封装/外壳: 16-UFQFN
包装: 带卷 (TR)
ISL62871, ISL62872
R OCSET = ----------------------------
Where:
- t VS is the voltage-step delay
- V NEW is the new setpoint voltage
- V OLD is the setpoint voltage that V NEW is changing
from
- I VS is the ±100μA setpoint voltage-step current; positive
when V NEW > V OLD , negative when V NEW < V OLD
- R T is the sum of the R SET programming resistors
Fault Protection
Overcurrent
The overcurrent protection (OCP) setpoint is programmed
with resistor R OCSET which is connected across the OCSET
and PHASE pins. Resistor R O is connected between the VO
pin and the actual output voltage of the converter. During
normal operation, the VO pin is a high impedance path,
therefore there is no voltage drop across R O . The value of
resistor R O should always match the value of resistor
R OCSET
Component Selection For R OCSET and C SEN
The value of R OCSET is calculated with Equation 25, which
is written as:
I OC ? DCR
(EQ. 25)
I OCSET
Where:
- R OCSET ( Ω ) is the resistor used to program the
overcurrent setpoint
- I OC is the output DC load current that will activate the
OCP fault detection circuit
- DCR is the inductor DC resistance
For example, if I OC is 20A and DCR is 4.5m Ω , the choice of
R OCSET is = 20A x 4.5m Ω /10μA = 9k Ω.
Resistor R OCSET and capacitor C SEN form an R-C network
to sense the inductor current. To sense the inductor current
correctly not only in DC operation, but also during dynamic
operation, the R-C network time constant R OCSET C SEN
needs to match the inductor time constant L/DCR. The value
of C SEN is then written as Equation 26:
C SEN = ------------------------------------------
R OCSET ? DCR
PHASE
+
DCR
R OCSET
L
V DCR
C SEN
I L
_
V O
C O
L
(EQ. 26)
For example, if L is 1.5μH, DCR is 4.5m Ω , and R OCSET is
9k Ω, the choice of C SEN = 1.5μH/(9k Ω x 4.5m Ω ) = 0.037μF .
10?μ
OCSET
+ V ROCSET
_
When an OCP fault is declared, the PGOOD pin will
pull-down to 35 Ω and latch off the converter. The fault will
R O
VO
FIGURE 10. OVERCURRENT PROGRAMMING CIRCUIT
Figure 10 shows the overcurrent set circuit. The inductor
consists of inductance L and the DC resistance DCR. The
inductor DC current I L creates a voltage drop across DCR,
which is given by Equation 22:
remain latched until the EN pin has been pulled below the
falling EN threshold voltage V ENTHF or if VCC has decayed
below the falling POR threshold voltage VVCC_THF .
Overvoltage
The OVP fault detection circuit triggers after the FB pin
voltage is above the rising overvoltage threshold V OVRTH for
more than 2μs. For example, if the converter is programmed
to regulate 1.0V at the FB pin, that voltage would have to
V DCR = I L ? DCR
(EQ. 22)
rise above the typical V OVRTH threshold of 116% for more
than 2μs in order to trip the OVP fault latch. In numerical terms,
VCC_THF . An OVP fault cannot be reset by pulling the EN
The I OCSET current source sinks 10μA into the OCSET pin,
creating a DC voltage drop across the resistor R OCSET ,
which is given by Equation 23:
V ROCSET = 10 μ A ? R OCSET (EQ. 23)
The DC voltage difference between the OCSET pin and the
VO pin, which is given by Equation 24:
V OCSET – V VO = V DCR – V ROCSET = I L ? DCR – I OCSET ? R OCSET
(EQ. 24)
The IC monitors the voltage of the OCSET pin and the VO
pin. When the voltage of the OCSET pin is higher than the
voltage of the VO pin for more than 10μs, an OCP fault
latches the converter off.
14
that would be 116% x 1.0V = 1.16V. When an OVP fault is
declared, the PGOOD pin will pull-down to 65 Ω and latch-off
the converter. The OVP fault will remain latched until VCC
has decayed below the falling POR threshold voltage
V
pin below the falling EN threshold voltage V ENTHF .
Although the converter has latched-off in response to an
OVP fault, the LGATE gate-driver output will retain the ability
to toggle the low-side MOSFET on and off, in response to
the output voltage transversing the V OVRTH and V OVFTH
thresholds. The LGATE gate-driver will turn-on the low-side
MOSFET to discharge the output voltage, protecting the
load. The LGATE gate-driver will turn-off the low-side
MOSFET once the FB pin voltage is lower than the falling
overvoltage threshold V OVRTH for more than 2μs. The
falling overvoltage threshold V OVFTH is typically 102%. That
FN6707.0
August 14, 2008
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