参数资料
型号: ISL62872HRUZ-T
厂商: Intersil
文件页数: 25/25页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 20-TQFN
标准包装: 3,000
系列: Robust Ripple Regulator™ (R³)
PWM 型: 控制器
输出数: 1
频率 - 最大: 330kHz
占空比: 100%
电源电压: 3.3 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -10°C ~ 100°C
封装/外壳: 16-UFQFN
包装: 带卷 (TR)
ISL62871, ISL62872
Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)
6
D
A
B
L16.2.6x1.8A
16 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE
MILLIMETERS
INDEX AREA
2X
0.10 C
N
1 2
E
SYMBOL
A
A1
MIN
0.45
-
NOMINAL
0.50
-
MAX
0.55
0.05
NOTES
-
-
2X
0.10 C
A3
0.127 REF
-
TOP VIEW
b
D
0.15
2.55
0.20
2.60
0.25
2.65
5
-
0.10 C
0.05 C
A
C
E
e
1.75
1.80
0.40 BSC
1.85
-
-
SEATING PLANE
A1
SIDE VIEW
L
L1
0.35
0.45
0.40
0.50
0.45
0.55
-
-
e
N
Nd
16
4
2
3
PIN #1 ID
Ne
4
3
1 2
θ
0
-
12
4
L1
NX L
Rev. 4 8/06
(DATUM B)
NX b
16X
5
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
(DATUM A)
BOTTOM VIEW
CL
0.10 M C A B
0.05 M C
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on D and E side,
respectively.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
NX (b)
5
(A1)
L
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Maximum package warpage is 0.05mm.
SECTION "C-C"
C C
e
TERMINAL TIP
8. Maximum allowable burrs is 0.076mm in all directions.
9. JEDEC Reference MO-255.
10. For additional information, to assist with the PCB Land Pattern
Design effort, see Intersil Technical Brief TB389.
3.00
1.80
1.40
1.40
2.20
0.90
0.40
0.50
0.20
0.40
0.20
10 LAND PATTERN
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
25
FN6707.0
August 14, 2008
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