参数资料
型号: ISL6307ACRZ
厂商: Intersil
文件页数: 11/33页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 48-QFN
标准包装: 43
PWM 型: 电压模式
输出数: 6
频率 - 最大: 275kHz
占空比: 66.7%
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 48-VFQFN 裸露焊盘
包装: 管件
ISL6307A
Functional Pin Description
VCC - Supplies all the power necessary to operate the chip.
The controller starts to operate when the voltage on this pin
exceeds the rising POR threshold and shuts down when the
voltage on this pin drops below the falling POR threshold.
Connect this pin directly to a +5V supply.
GND - Bias and reference ground for the IC. The bottom
metal base of ISL6307A is the GND.
EN_PWR - This pin is a threshold-sensitive enable input for
the controller. Connecting the 12V supply to EN_PWR
through an appropriate resistor divider provides a means to
synchronize power-up of the controller and the MOSFET
driver ICs. When EN_PWR is driven above 0.875V, the
ISL6307A is active depending on status of EN_VTT, the
internal POR, and pending fault states. Driving EN_PWR
below 0.745V will clear all fault states and prime the
ISL6307A to soft-start when re-enabled.
EN_VTT - This pin is another threshold-sensitive enable
input for the controller. It’s typically connected to VTT output
of VTT voltage regulator in the computer mother board.
When EN_VTT is driven above 0.875V, the ISL6307A is
active depending on status of ENLL, the internal POR, and
pending fault states. Driving EN_VTT below 0.745V will clear
all fault states and prime the ISL6307A to soft-start when re-
enabled .
FS - Use this pin to set up the desired switching frequency. A
resistor, placed from FS to ground will set the switching fre-
quency. The relationship between the value of the resistor
and the switching frequency will be described by an approxi-
mate Equation 40.
SS - Use this pin to set up the desired start-up oscillator fre-
quency. A resistor, placed from SS to ground will set up the
soft-start ramp rate. The relationship between the value of the
resistor and the soft-start ramp up time will be described by
an approximate Equation 14.
VID7, VID6, VID5, VID4, VID3, VID2, VID1 and VID0 -
These are the inputs to the internal DAC that provide the
reference voltage for output regulation. Connect these pins
either to open-drain outputs with or without external pull-up
resistors or to active pull-up outputs. VID7-VID0 have 40μA
internal pull-up current sources that diminish to zero as the
voltage rises above the logic-high level. These inputs can be
pulled up as high as VCC plus 0.3V.
When a VID code causes a shut-off, the controller needs to
be reset before it will start again.
VSEN and RGND - VSEN and RGND form the precision
differential remote-sense amplifier. This amplifier converts
the differential voltage of the remote output to a single-ended
voltage referenced to local ground. Connect VSEN and
RGND to the sense pins of the remote load.
11
VDIFF - VDIFF is the amplifier ’s output and the input to the
regulation and protection circuitry. It should be connected to
FB through a resistor.
FB and COMP - Inverting input and output of the error
amplifier respectively. FB is connected to VDIFF through a
resistor. A negative current, proportional to output current is
present on the FB pin. A properly sized resistor between
VDIFF and FB sets the load-line (droop). The droop scale
factor is set by the ratio of the ISEN resistors and the lower
MOSFET R DS(ON) . COMP is tied back to FB through an
external R-C network to compensate the regulator.
DAC and REF - The DAC output pin is the output of the
precision internal DAC reference. The REF input pin is the
positive input of the Error Amp. In typical applications, a 1k ? ,
1% resistor is used between DAC and REF to generate a
precise offset voltage. This voltage is proportional to the
offset current determined by the offset resistor from OFS to
ground or VCC. A capacitor is used between REF and
ground to smooth the voltage transition during Dynamic
VID? operations.
PWM1, PWM2, PWM3, PWM4, PWM5, PWM6 - Pulse-
width modulation outputs. Connect these pins to the PWM
input pins of the Intersil driver IC. The number of active
channels is determined by the state of PWM3, PWM4,
PWM5 and PWM 6. Tie PWM3 to VCC to configure for
2-phase operation. Tie PWM4 to VCC to configure for
3-phase operation. Tie PWM5 to VCC to configure for
4-phase operation. Tie PWM6 to VCC to configure for
5-phase operation.
ISEN1+, ISEN1-; ISEN2+, ISEN2-; ISEN3+, ISEN3-;
ISEN4+, ISEN4-; ISEN5+, ISEN5-; ISEN6+, ISEN6- - The
ISEN+ and ISEN- pins are current sense inputs to individual
differential amplifiers. The sensed current is used as a
reference for channel balancing, protection, and regulation.
Inactive channels should have their respective current sense
inputs left open (for example, for 3-phase operation open
ISEN4+).
For DCR sensing, connect each ISEN- pin to the node
between the RC sense elements. Tie the ISEN+ pin to the
other end of the sense capacitor through a resistor, R ISEN .
The voltage across the sense capacitor is proportional to the
inductor current. The sense current is proportional to the
output current, and scaled by the DCR of the inductor and
R ISEN .
When configured for R DS(ON) current sensing, the ISEN1-,
ISEN2-, ISEN3-, ISEN4-, ISEN5-, ISEN6- pins are grounded
at the lower MOSFET sources. The ISEN1+, ISEN2+,
ISEN3+, ISEN4+, ISEN5+, ISEN6+ pins are then held at a
virtual ground, such that a resistor connected between them,
and the drain terminal of the associated lower MOSFET, will
carry a current proportional to the current flowing through
that channel. The current is determined by the negative
FN9236.0
February 6, 2006
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