参数资料
| 型号： | ISL6308CRZ-T |
| 厂商： | Intersil |
| 文件页数： | 22/28页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 3PHASE BUCK 40-QFN |
| 标准包装： | 4,000 |
| 应用： | 控制器，DDR |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 2.3 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 供应商设备封装： | 40-QFN（6x6） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页当前第22页第23页第24页第25页第26页第27页第28页
ISL6308
F 0 > ---------------------------------
R 2 = R 1 ? -----------------------------------------------
2 π ? V OSC ? R 1 ? F 0 ? L
Case 3:
1
2 π ? C ? ESR
2 π ? F 0 ? V OSC ? L
0.66 ? V IN ? ESR
0.66 ? V IN ? ESR ? C
C 2 = ---------------------------------------------------------------
sawtooth wave to provide a pulse-width modulated wave with
an amplitude of V IN at the PHASE node. The PWM wave is
smoothed by the output filter (L and C). The output filter
capacitor bank’s equivalent series resistance is represented by
the series resistor E.
C 2
In Equation 28, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent series resistance of
COMP
R 2
C 1
R 3
C 3
the bulk output filter capacitance; and V PP is the peak-to-peak
-
sawtooth signal amplitude as described in “Electrical
E/A
+
FB
R 1
Once selected, the compensation values in Equation 28
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
VREF
VDIFF
improved by making adjustments to R 2 . Slowly increase the
value of R 2 while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
C 1 will not need adjustment. Keep the value of C 1 from
Equation 28 unless some performance issue is noted.
The optional capacitor C 2 , is sometimes needed to bypass
-
+
OSCILLATOR
RGND
VSEN
V IN
V OUT
noise away from the PWM comparator (see Figure 19). Keep
PWM
V OSC
a position available for C 2 , and be prepared to install a high
frequency capacitor of between 22pF and 150pF in case any
CIRCUIT
UGATE
L
DCR
leading edge jitter problem is noted.
HALF-BRIDGE
Compensating the Converter Operating without
Load-Line Regulation
The ISL6308 multi-phase converter operating without load
DRIVE
PHASE
LGATE
C
ESR
line regulation behaves in a similar manner to a voltage
mode controller. This section highlights the design
consideration for a voltage-mode controller requiring external
ISL6308
EXTERNAL CIRCUIT
compensation. To address a broad range of applications, a
type-3 feedback network is recommended (see Figure 20).
C 2
FIGURE 21. VOLTAGE-MODE BUCK CONVERTER
COMPENSATION DESIGN
The modulator transfer function is the small-signal transfer
R 2
C 1
COMP
function of V OUT /V COMP . This function is dominated by a DC
gain, given by d MAX V IN /V OSC , and shaped by the output
filter, with a double pole break frequency at F LC and a zero at
C 3
R 3
R 1
FB
VDIFF
ISL6308
F CE . For the purpose of this analysis, L and DCR represent
the individual channel inductance and its DCR divided by 3
(equivalent parallel value of the three output inductors), while
C and ESR represents the total output capacitance and its
equivalent series resistance.
F LC = ---------------------------
F CE = ---------------------------------
FIGURE 20. COMPENSATION CONFIGURATION FOR
NON-LOAD-LINE REGULATED ISL6308 CIRCUIT
1
2 π ? L ? C
1
2 π ? C ? ESR
(EQ. 29)
Figure 21 highlights the voltage-mode control loop for a
synchronous-rectified buck converter, applicable, with a
small number of adjustments, to the multi-phase ISL6308
circuit. The output voltage (V OUT ) is regulated to the reference
voltage, VREF, level. The error amplifier output (COMP pin
voltage) is compared with the oscillator (OSC) modified
22
The compensation network consists of the error amplifier
(internal to the ISL6308) and the external R 1 -R 3 , C 1 -C 3
components. The goal of the compensation network is to
provide a closed loop transfer function with high 0dB crossing
frequency (F 0 ; typically 0.1 to 0.3 of F SW ) and adequate phase
margin (better than 45°). Phase margin is the difference
FN9208.4
September 30, 2008
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6308CRZ-TR5374 | 制造商:Intersil Corporation 功能描述:ISL6308CRZ W/ 24HR BURN-IN - Tape and Reel 制造商:Intersil Corporation 功能描述:IC CTRLR PWM 3PHASE BUCK 40-QFN 制造商:Intersil 功能描述:ISL6308CRZ W/24HRU RN-IN |
| ISL6308CRZ-TR5453 | 制造商:Intersil Corporation 功能描述:STD. ISL6308CRZ-T W/GOLD BOND WIRE ONLY - Tape and Reel |
| ISL6308EVAL1Z | 制造商:Intersil Corporation 功能描述:ISL6308 EVALUATION BOARD 1 - ROHS COMPLIANT - QFN - Bulk |
| ISL6308IRZ | 功能描述:电压模式 PWM 控制器 DAC-LESS MULTI-PHS PWM CNTRLR W/3-DRVRS RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ISL6308IRZ-T | 功能描述:电压模式 PWM 控制器 DAC-LESS MULTI-PHS PWM CNTRLR W/3-DRVRS RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
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