参数资料
| 型号： | ISL6313BIRZ |
| 厂商： | Intersil |
| 文件页数： | 12/33页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 2PHASE BUCK 36-QFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 50 |
| 应用： | 控制器，Intel VR11，AMD CPU |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.5 V ~ 1.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-WFQFN 裸露焊盘 |
| 供应商设备封装： | 36-TQFN 裸露焊盘（6x6） |
| 包装： | 管件 |
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ISL6313B
a filtered copy of the voltage on the COMP pin. The voltage
on the APA pin is a copy of the COMP pin voltage that has
I ER toward zero. The same method for error signal
correction is applied to each active channel.
been negatively offset. If the APA pin exceeds the filtered
COMP pin voltage an APA event occurs and all of the
channels are forced on.
V COMP
+
-
∑
MODULATOR
RAMP
+
-
PWM1
TO GATE
CONTROL
LOGIC
The APA trip level is the amount of DC offset between the
COMP pin and the APA pin. This is the voltage excursion
FILTER
f(s)
WAVEFORM
that the APA and COMP pin must have during a transient
event to activate the Adaptive Phase Alignment circuitry.
This APA trip level is set through a resistor, R APA , that
connects from the APA pin to the COMP pin. A 100 μ A
I ER
∑ -
+
I AVG
÷ 2
∑
+
+
I 2
current flows across R APA into the APA pin to set the APA
trip level as described in Equation 3. An APA trip level of
500mV is recommended for most applications. A 1000pF
capacitor, C APA , should also be placed across the R APA
resistor to help with noise immunity.
I 1
FIGURE 4. CHANNEL-1 PWM FUNCTION AND
CURRENT-BALANCE ADJUSTMENT
V APA ( TRIP ) = R APA ? 100 × 10
– 6
(EQ. 3)
Number of Active Channels
The default number of active channels on the ISL6313B is
two for 2-phase operation. If single-phase operation is
desired the ISEN2- pin should be tied to the VCC pin. This
will disable Channel 2, so only Channel 1 will fire. In single
phase operation all of the Channel 2 pins should be left
unconnected including the PHASE2, LGATE2, UGATE2,
BOOT2, and ISEN2+ pins.
Channel-Current Balance
One important benefit of multi-phase operation is the thermal
advantage gained by distributing the dissipated heat over
multiple devices and greater area. By doing this the designer
avoids the complexity of driving parallel MOSFETs and the
expense of using expensive heat sinks and exotic magnetic
materials.
In order to realize the thermal advantage, it is important that
each channel in a multi-phase converter be controlled to
carry equal amounts of current at any load level. To achieve
this, the currents through each channel must be sensed
continuously every switching cycle. The sensed currents, I n ,
from each active channel are summed together and divided
by the number of active channels. The resulting cycle
average current, I AVG , provides a measure of the total
load-current demand on the converter during each switching
cycle. Channel-current balance is achieved by comparing
the sensed current of each channel to the cycle average
current, and making the proper adjustment to each channel
pulse width based on the error. Intersil’s patented
current-balance method is illustrated in Figure 4, with error
correction for channel 1 represented. In the figure, the cycle
average current, I AVG , is compared with the Channel 1
sensed current, I 1 , to create an error signal I ER .
The filtered error signal modifies the pulse width
commanded by V COMP to correct any unbalance and force
12
PWM
SWITCHING PERIOD
I L
I SEN
TIME
FIGURE 5. CONTINUOUS CURRENT SAMPLING
Continuous Current Sensing
In order to realize proper current-balance, the currents in
each channel are sensed continuously every switching
cycle. During this time the current-sense amplifier uses the
ISEN inputs to reproduce a signal proportional to the
inductor current, I L . This sensed current, I SEN , is simply a
scaled version of the inductor current.
The ISL6313B supports inductor DCR current sensing to
continuously sense each channel’s current for
channel-current balance. The internal circuitry, shown in
Figure 6 represents channel n of an N-Channel converter.
This circuitry is repeated for each channel in the converter,
but may not be active depending on how many channels are
operating.
FN6809.0
November 6, 2008
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| ISL6313BIRZ-T | 功能描述:IC CTRLR PWM BUCK 2PHASE 36-TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6313CRZ | 制造商:Intersil Corporation 功能描述:TWO-PHASE BUCK PWM CNTRLR W/ INTEGRATED MOSFET DRVRS FOR INT - Rail/Tube 制造商:Intersil Corporation 功能描述:Switching Controllers 2-PH PWM CNTRLR W/2 INTEGRTD DRVRS 36LD |
| ISL6313CRZ-T | 功能描述:IC CTRLR PWM 2PHASE BUCK 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6313IRZ | 功能描述:IC CTRLR PWM 2PHASE BUCK 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6313IRZ-T | 功能描述:IC CTRLR PWM 2PHASE BUCK 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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